74F175DCQR

更新时间： 2024-02-14 02:19:23

阅读下载

获取价格

如果您发现信息不准确，欢迎纠错

74F175DCQR 数据手册

April 1988

Revised July 1999

74F175

Quad D-Type Flip-Flop

General Description

Features

The 74F175 is a high-speed quad D-type flip-flop. The

device is useful for general flip-flop requirements where

clock and clear inputs are common. The information on the

D inputs is stored during the LOW-to-HIGH clock transition.

Both true and complemented outputs of each flip-flop are

provided. A Master Reset input resets all flip-flops, inde-

pendent of the Clock or D inputs, LOW.

■ Edge-triggered D-type inputs

■ Buffered positive edge-triggered clock

■ Asynchronous common reset

■ True and complement output

Ordering Code:

Order Number Package Number

Package Description

74F175SC

74F175SJ

74F175PC

M16A

M16D

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

DS009490

www.fairchildsemi.com

12 3 4 5 6

下载PDF

型号	品牌	描述	获取价格	数据表
74F175DCX	TI	IC D FLIP-FLOP, FF/Latch	获取价格
74F175PC	NSC	Quad D Flip-Flop	获取价格
74F175PC	FAIRCHILD	Quad D-Type Flip-Flop	获取价格
74F175PC	TI	F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, 0.300 IN	获取价格
74F175PC_NL	FAIRCHILD	暂无描述	获取价格
74F175PCQM	FAIRCHILD	D Flip-Flop, 4-Func, Positive Edge Triggered, TTL, PDIP16,	获取价格