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74F132SCX_NL PDF预览

74F132SCX_NL

更新时间: 2024-11-05 21:22:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 64K
描述
NAND Gate, F/FAST Series, 4-Func, 2-Input, TTL, PDSO14, 0.150 INCH, MS-120, SOIC-14

74F132SCX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.39
系列:F/FASTJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.65 mm
逻辑集成电路类型:NAND GATE最大I(ol):0.02 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):18 mAProp。Delay @ Nom-Sup:13 ns
传播延迟(tpd):13 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

74F132SCX_NL 数据手册

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April 1988  
Revised September 2000  
74F132  
Quad 2-Input NAND Schmitt Trigger  
ture. The Schmitt Trigger uses positive feedback to effec-  
tively speed-up slow input transitions, and provide different  
input threshold voltages for positive and negative-going  
transitions. This hysteresis between the positive-going and  
negative-going input threshold (typically 800 mV) is deter-  
mined by resistor ratios and is essentially insensitive to  
temperature and supply voltage variations.  
General Description  
The F132 contains four 2-input NAND gates which accept  
standard TTL input signals and provide standard TTL out-  
put levels. They are capable of transforming slowly chang-  
ing input signals into sharply defined, jitter-free output  
signals. In addition, they have a greater noise margin than  
conventional NAND gates.  
Each circuit contains a 2-input Schmitt Trigger followed by  
level shifting circuitry and a standard FAST output struc-  
Ordering Code:  
Order Number Package Number  
Package Description  
74F132SC  
74F132SJ  
74F132PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Function Table  
Unit Loading/Fan Out  
Inputs  
Outputs  
A
L
B
L
O
H
H
H
L
U.L.  
Input IIH/IIL  
Pin Names Description  
HIGH/LOW Output IOH/IOL  
L
H
L
An, Bn  
On  
Inputs  
1.0/1.0  
50/33.3  
20 µA/0.6 mA  
1 mA/20 mA  
H
H
Outputs  
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
FAST is a registered trademark of Fairchild Semiconductor Corporation  
© 2000 Fairchild Semiconductor Corporation  
DS009477  
www.fairchildsemi.com  

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