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74F02SJ PDF预览

74F02SJ

更新时间: 2024-11-05 22:22:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路光电二极管
页数 文件大小 规格书
4页 51K
描述
Quad 2-Input NOR Gate

74F02SJ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.53
系列:F/FASTJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:10.2 mm
逻辑集成电路类型:NOR GATE最大I(ol):0.02 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):13 mA
Prop。Delay @ Nom-Sup:6.5 ns传播延迟(tpd):6.5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

74F02SJ 数据手册

 浏览型号74F02SJ的Datasheet PDF文件第2页浏览型号74F02SJ的Datasheet PDF文件第3页浏览型号74F02SJ的Datasheet PDF文件第4页 
April 1988  
Revised July 1999  
74F02  
Quad 2-Input NOR Gate  
General Description  
This device contains four independent gates, each of which  
performs the logic NOR function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F02SC  
74F02SJ  
74F02PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Unit Loading/Fan Out  
Input IIH/IIL  
U.L.  
Pin Names  
Description  
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
An, Bn  
On  
Inputs  
20 µA/0.6 mA  
1 mA/20 mA  
Outputs  
50/33.3  
© 1999 Fairchild Semiconductor Corporation  
DS009455  
www.fairchildsemi.com  

74F02SJ 替代型号

型号 品牌 替代类型 描述 数据表
74F02SJX FAIRCHILD

完全替代

NOR Gate, F/FAST Series, 4-Func, 2-Input, TTL, PDSO14, 5.30 MM, EIAJ TYPE2, SOP-14

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