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74F02PC PDF预览

74F02PC

更新时间: 2024-11-05 22:22:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
4页 51K
描述
Quad 2-Input NOR Gate

74F02PC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.16
系列:F/FASTJESD-30 代码:R-PDIP-T14
JESD-609代码:e3长度:19.18 mm
逻辑集成电路类型:NOR GATE最大I(ol):0.02 A
功能数量:4输入次数:2
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:5 V
最大电源电流(ICC):13 mAProp。Delay @ Nom-Sup:6.5 ns
传播延迟(tpd):6.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mmBase Number Matches:1

74F02PC 数据手册

 浏览型号74F02PC的Datasheet PDF文件第2页浏览型号74F02PC的Datasheet PDF文件第3页浏览型号74F02PC的Datasheet PDF文件第4页 
April 1988  
Revised July 1999  
74F02  
Quad 2-Input NOR Gate  
General Description  
This device contains four independent gates, each of which  
performs the logic NOR function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F02SC  
74F02SJ  
74F02PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Unit Loading/Fan Out  
Input IIH/IIL  
U.L.  
Pin Names  
Description  
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
An, Bn  
On  
Inputs  
20 µA/0.6 mA  
1 mA/20 mA  
Outputs  
50/33.3  
© 1999 Fairchild Semiconductor Corporation  
DS009455  
www.fairchildsemi.com  

74F02PC 替代型号

型号 品牌 替代类型 描述 数据表
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