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74CBTLV3861BQ PDF预览

74CBTLV3861BQ

更新时间: 2024-12-01 13:04:55
品牌 Logo 应用领域
恩智浦 - NXP 开关
页数 文件大小 规格书
18页 165K
描述
CBTLV/3B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PQCC24, 5.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, SOT815-1, DHVQFN-24

74CBTLV3861BQ 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:QFN包装说明:5.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, SOT815-1, DHVQFN-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.62
Is Samacsys:N系列:CBTLV/3B
JESD-30 代码:R-PQCC-N24长度:5.5 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER
峰值回流温度(摄氏度):260传播延迟(tpd):0.31 ns
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3.5 mmBase Number Matches:1

74CBTLV3861BQ 数据手册

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74CBTLV3861  
10-bit bus switch with output enable  
Rev. 3 — 16 December 2011  
Product data sheet  
1. General description  
The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is  
LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the  
switch is disabled.  
To ensure the high-impedance OFF-state during power-up or power-down, OE should be  
tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined  
by the current-sinking capability of the driver.  
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 2.3 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features and benefits  
Supply voltage range from 2.3 V to 3.6 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM AEC-Q100-011 revision B exceeds 1000 V  
5 switch connection between two ports  
Rail to rail switching on data I/O ports  
CMOS low power consumption  
Latch-up performance exceeds 250 mA per JESD78B Class I level A  
IOFF circuitry provides partial Power-down mode operation  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C  

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