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74CBTLV1G125GW PDF预览

74CBTLV1G125GW

更新时间: 2024-11-09 03:07:43
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器开关逻辑集成电路光电二极管
页数 文件大小 规格书
18页 122K
描述
Single bus switch

74CBTLV1G125GW 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SON
包装说明:1.25 MM, PLASTIC, MO-252, SC-88A, SOT353-1, TSSOP-5针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.21系列:CBTLV/3B
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2.05 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:1
功能数量:1端口数量:2
端子数量:5最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2.5/3.3 V
传播延迟(tpd):0.39 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1.25 mm
Base Number Matches:1

74CBTLV1G125GW 数据手册

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74CBTLV1G125  
Single bus switch  
Rev. 01 — 2 February 2007  
Product data sheet  
1. General description  
The 74CBTLV1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS  
device, superior to most advanced CMOS compatible TTL families.  
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 2.3 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
The 74CBTLV1G125 provides a single high-speed line switch. The switch is disabled  
when the output enable (OE) input is high.  
To ensure the high-impedance OFF-state during power up or power down, OE should be  
tied to the VCC through a pullup resistor. The minimum value of the resistor is determined  
by the current-sinking capability of the driver.  
2. Features  
Supply voltage range from 2.3 V to 3.6 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V).  
ESD protection:  
HBM JESD22-A114-D exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101-C exceeds 1000 V  
5 switch connection between two ports  
Rail to rail switching on data I/O ports  
CMOS low power consumption  
Latch-up performance meets requirements of JESD78 Class I  
IOFF circuitry provides partial power down mode operation  
Multiple package options  
Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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