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74CBT16800CDGGRE4 PDF预览

74CBT16800CDGGRE4

更新时间: 2024-01-13 11:45:01
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器开关逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
13页 498K
描述
20-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS 5-V BUS SWITCH WITH -2-V UNDERSHOOT PROTECTION

74CBT16800CDGGRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.73系列:CBT/FST/QS/5C/B
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:12.5 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:1
功能数量:20端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):0.24 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74CBT16800CDGGRE4 数据手册

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ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢊꢊ ꢄ  
ꢋ ꢊ ꢌꢅꢍ ꢆ ꢎ ꢏꢆ ꢅꢐꢀ ꢀꢑ ꢍ ꢆꢄ ꢒ ꢑ ꢍꢆ ꢒ ꢓꢔꢏ ꢄꢒꢕꢔ ꢖꢏ ꢗ ꢘ ꢐꢆ ꢓ ꢐꢆꢀ  
ꢙ ꢌꢚ ꢅꢐꢀ ꢀꢑ ꢍ ꢆꢄ ꢒ ꢑ ꢍꢆ ꢒ ꢛ ꢋ ꢌꢚ ꢐꢁꢗ ꢏꢔꢀꢒ ꢘꢘ ꢆ ꢓꢔ ꢘ ꢆꢏ ꢄꢆ ꢍꢘ ꢁ  
SCDS117C − JANUARY 2003 − REVISED OCTOBER 2003  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
D
D
D
Member of the Texas Instruments  
WidebusFamily  
Undershoot Protection for Off-Isolation on  
A and B Ports Up To −2 V  
BIASV  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
GND  
1A7  
1A8  
1A9  
1A10  
2A1  
2A2  
1OE  
2OE  
1B1  
1B2  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
1B9  
1B10  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
2B7  
2B8  
2B9  
2B10  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
2
B-Port Outputs Are Precharged by Bias  
Voltage (BIASV) to Minimize Signal  
Distortion During Live Insertion and  
Hot-Plugging  
3
4
5
6
D
D
D
D
Supports PCI Hot Plug  
7
8
Bidirectional Data Flow, With Near-Zero  
Propagation Delay  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Low ON-State Resistance (r  
)
on  
Characteristics (r = 3 Typical)  
on  
Low Input/Output Capacitance Minimizes  
Loading and Signal Distortion  
(C  
= 5.5 pF Typical)  
io(OFF)  
V
CC  
D
D
Data and Control Inputs Provide  
Undershoot Clamp Diodes  
2A3  
GND  
2A4  
2A5  
2A6  
2A7  
2A8  
2A9  
2A10  
Low Power Consumption  
(I  
= 3 µA Max)  
CC  
D
V
Operating Range From 4 V to 5.5 V  
CC  
D
Data I/Os Support 0 to 5-V Signaling Levels  
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)  
D
D
D
D
Control Inputs Can Be Driven by TTL or  
5-V/3.3-V CMOS Outputs  
I
Supports Partial-Power-Down Mode  
off  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Performance Tested Per JESD 22  
− 2000-V Human-Body Model  
(A114-B, Class II)  
− 1000-V Charged-Device Model (C101)  
D
Supports Both Digital and Analog  
Applications: PCI Interface, Memory  
Interleaving, Bus Isolation, Low-Distortion  
Signal Gating  
description/ordering information  
The SN74CBT16800C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r ),  
on  
allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the  
SN74CBT16800C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring  
that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias  
voltage (BIASV) to minimize live-insertion noise.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
ꢆꢧ  
Copyright 2003, Texas Instruments Incorporated  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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