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74AVCH4T245RSVRG4

更新时间： 2024-11-29 06:31:51
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
22页 891K
描述
4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

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中文翻译

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74AVCH4T245RSVRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：QFN-16针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.37
Is Samacsys：N其他特性：TWO SEPARATE CONFIGURABLE POWER SUPPLY RAILS FOR PORT A AND PORT B
控制类型：COMMON CONTROL计数方向：BIDIRECTIONAL
系列：AVCJESD-30 代码：R-PQCC-N16
JESD-609代码：e4长度：2.6 mm
负载电容（CL）：15 pF逻辑集成电路类型：BUS TRANSCEIVER
最大I（ol）：0.012 A湿度敏感等级：1
位数：2功能数量：2
端口数量：2端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：VQCCN
封装形状：RECTANGULAR封装形式：CHIP CARRIER, VERY THIN PROFILE
包装方法：TR峰值回流温度（摄氏度）：260
最大电源电流（ICC）：0.016 mAProp。Delay @ Nom-Sup：6.3 ns
传播延迟（tpd）：6.3 ns认证状态：Not Qualified
座面最大高度：0.55 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.2 V标称供电电压 (Vsup)：1.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.4 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：1.5/3.3V &1.5/3.3V宽度：1.8 mm
Base Number Matches：1

74AVCH4T245RSVRG4 数据手册

 浏览型号74AVCH4T245RSVRG4的Datasheet PDF文件第2页浏览型号74AVCH4T245RSVRG4的Datasheet PDF文件第3页浏览型号74AVCH4T245RSVRG4的Datasheet PDF文件第4页浏览型号74AVCH4T245RSVRG4的Datasheet PDF文件第5页浏览型号74AVCH4T245RSVRG4的Datasheet PDF文件第6页浏览型号74AVCH4T245RSVRG4的Datasheet PDF文件第7页 
SN74AVCH4T245  
4-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES577D–JUNE 2004–REVISED JUNE 2007  
FEATURES  
•
Control Inputs VIH/VIL Levels Are Referenced  
to VCCA Voltage  
•
Max Data Rates  
–
–
–
–
–
380 Mbps (1.8V to 3.3V Translation)  
200 Mbps (<1.8V to 3.3V Translation)  
200 Mbps (Translate to 2.5V or 1.8V)  
150 Mbps (Translate to 1.5V)  
•
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.2-V to  
3.6-V Power-Supply Range  
•
•
I/Os Are 4.6-V Tolerant  
100 Mbps (Translate to 1.2V)  
Ioff Supports Partial Power-Down-Mode  
Operation  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
ESD Protection Exceeds JESD 22  
–
–
–
8000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
D, DGV, OR PW PACKAGE  
(TOP VIEW)  
RGY PACKAGE  
(TOP VIEW)  
RSV PACKAGE  
(TOP VIEW)  
V
V
CCB  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
CCA  
1DIR  
2DIR  
1A1  
1OE  
2OE  
1B1  
16 15 14 13  
1
16  
15  
14  
13  
12  
11  
10  
1DIR  
2DIR  
1A1  
1A2  
2A1  
2A2  
2
3
4
5
6
7
1OE  
2OE  
1B1  
1B2  
2B1  
2B2  
1
2
3
4
12  
11  
10  
9
2B2  
1OE  
1A2  
12 1B2  
VCCB  
GND  
GND  
2A2  
11  
10  
9
2A1  
2B1  
2B2  
GND  
VCCA  
1DIR  
2A2  
GND  
5
6
7
8
8
9
DESCRIPTION/ORDERING INFORMATION  
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is  
designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track  
VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVCH4T245 is optimized to operate with  
VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal  
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCH4T245 is designed for asynchronous communication between two data buses. The logic levels  
of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the  
A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A  
bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port  
outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or  
LOW level applied to prevent excess ICC and ICCZ  
.
The SN74AVCH4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA  
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance  
state. The bus-hold circuitry on the powered-up side always stays active.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...22

中文翻译

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74AVCH4T245RSVRG4 替代型号

型号 品牌 替代类型 描述 数据表
74AVCH4T245PWRG4 TI

完全替代

 4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT
SN74AVCH4T245PWR TI

类似代替

 4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT
SN74AVCH4T245PW TI

类似代替

 4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT

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