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74AVCH2T45 PDF预览

74AVCH2T45

更新时间: 2024-11-20 11:08:11
品牌 Logo 应用领域
圣邦微 - SGMICRO /
页数 文件大小 规格书
6页 433K
描述
2-Bit Dual-Supply Voltage Level Transceiver with 3-State Outputs

74AVCH2T45 数据手册

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74AVCH2T45  
2-Bit Dual-Supply Voltage  
Level Transceiver with 3-State Outputs  
GENERAL DESCRIPTION  
FEATURES  
The 74AVCH2T45 is a 2-bit, dual-supply voltage level  
transceiver. The nA and nB are two data input-output  
ports, DIR is a direction control input, and VCCA and  
VCCA Supply Voltage Range: 0.8V to 3.6V  
VCCB Supply Voltage Range: 0.8V to 3.6V  
Inputs Accept Voltages up to 3.6V  
+12mA/-12mA Output Current  
VCCB are dual-supply pins. The supply voltage of VCCA  
and VCCB can range from 0.8V to 3.6V, making the  
device suitable for translating among any of the 0.8V,  
1.2V, 1.5V, 1.8V, 2.5V and 3.3V voltage nodes. The nA  
and DIR signals are referenced to VCCA and nB signals  
Data Rates:  
500Mbps (1.8V to 3.3V Translation)  
320Mbps (< 1.8V to 3.3V Translation)  
320Mbps (Translate to 2.5V or 1.8V)  
280Mbps (Translate to 1.5V)  
are referenced to VCCB  
.
240Mbps (Translate to 1.2V)  
When DIR is set high, it allows transmission from nA to  
nB. When DIR is set low, it allows transmission from nB  
to nA. In suspend mode, when either VCCA or VCCB input  
is at GND, both nA and nB are in the high-impedance  
state.  
Outputs in High-Impedance State when VCCA or  
VCCB = 0V  
No External Pull-up/Pull-down Resistors are  
Required Due to the Bus Hold on Data Inputs  
-40to +125Operating Temperature Range  
Available in a Green VSSOP-8 Package  
This device is highly suitable for partial power-down  
applications using power-off leakage current (IOFF) circuit.  
When the device is powered down, the current backflow  
will be prevented from passing through the device.  
The active bus hold circuitry makes device unnecessary  
to use external pull-up/pull-down resistors by holding  
unused or floating data inputs at a valid logic level.  
FUNCTION TABLE  
SUPPLY  
CONTROL  
INPUT  
INPUT/OUTPUT (1)  
VOLTAGE  
VCCA, VCCB  
0.8V to 3.6V  
0.8V to 3.6V  
GND (3)  
DIR (2)  
nA  
nA = nB  
Inputs  
Z
nB  
Inputs  
nB = nA  
Z
LOGIC DIAGRAM  
L
H
X
5
DIR  
H = High Voltage Level  
L = Low Voltage Level  
X = Don’t Care  
2
1A  
7
Z = High-Impedance State  
1B  
3
NOTES:  
2A  
1. For the I/O data, the input circuit is always active.  
2. The DIR pin is referenced to VCCA.  
6
2B  
3. If at least one of VCCA or VCCB is at GND level, the device  
enters suspend mode.  
SG Micro Corp  
NOVEMBER 2022 – REV. A  
www.sg-micro.com  

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