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74AVCAH164245GRE4

更新时间： 2024-11-23 04:00:59
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
16页 385K
描述
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

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74AVCAH164245GRE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP-48针数：48
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.36
Is Samacsys：N控制类型：COMMON CONTROL
计数方向：BIDIRECTIONAL系列：AVC
JESD-30 代码：R-PDSO-G48JESD-609代码：e4
长度：12.5 mm逻辑集成电路类型：BUS TRANSCEIVER
最大I（ol）：0.012 A湿度敏感等级：1
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：1.5/3.3 V
最大电源电流（ICC）：0.08 mAProp。Delay @ Nom-Sup：6.8 ns
传播延迟（tpd）：7.6 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.4 V
标称供电电压 (Vsup)：1.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：1.5/3.3V &1.5/3.3V
宽度：6.1 mmBase Number Matches：1

74AVCAH164245GRE4 数据手册

 浏览型号74AVCAH164245GRE4的Datasheet PDF文件第2页浏览型号74AVCAH164245GRE4的Datasheet PDF文件第3页浏览型号74AVCAH164245GRE4的Datasheet PDF文件第4页浏览型号74AVCAH164245GRE4的Datasheet PDF文件第5页浏览型号74AVCAH164245GRE4的Datasheet PDF文件第6页浏览型号74AVCAH164245GRE4的Datasheet PDF文件第7页 
SN74AVCAH164245  
16-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES396A–JULY 2002–REVISED JUNE 2005  
FEATURES  
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
•
Member of the Texas Instruments Widebus™  
Family  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.4-V to  
3.6-V Power-Supply Range  
•
DOC™ Circuitry Dynamically Changes Output  
Impedance, Resulting in Noise Reduction  
Without Speed Degradation  
•
•
•
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
•
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA  
at 2.5-V VCC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
•
Control Inputs VIH/VIL Levels Are Referenced  
to VCCA Voltage  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
If Either VCC Input Is at GND, Both Ports Are in  
the High-Impedance State  
– 1000-V Charged-Device Model (C101)  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
DESCRIPTION/ORDERING INFORMATION  
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The  
A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to  
track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage  
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device  
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA  
.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or  
pulldown resistors with the bus-hold circuitry is not recommended.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND,  
then both ports are in the high-impedance state.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74AVCAH164245GR  
TOP-SIDE MARKING  
AVCAH164245  
WAH4245  
TSSOP – DGG  
TVSOP – DGV  
VFBGA – GQL  
Tape and reel  
–40°C to 85°C  
Tape and reel  
Tape and reel  
SN74AVCAH164245VR  
SN74AVCAH164245KR  
WAH4245  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, DOC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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74AVCAH164245GRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74AVCA164245GR TI

类似代替

 16 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPU
SN74AVCAH164245GR TI

类似代替

 16 BIT DUAL BUS TRANSCEIVER

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