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74AVC4T245QRGYRQ1 PDF预览

74AVC4T245QRGYRQ1

更新时间: 2024-11-28 12:50:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件PC
页数 文件大小 规格书
16页 646K
描述
4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

74AVC4T245QRGYRQ1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:GREEN, PLASTIC, MO-241BB, VQFN-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.71Samacsys Confidence:4
Samacsys Status:ReleasedSamacsys PartID:310514
Samacsys Pin Count:17Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:RGY (R-PVQFN-N16)_1
Samacsys Released Date:2019-01-23 08:57:16Is Samacsys:N
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:AVCJESD-30 代码:R-PQCC-N16
JESD-609代码:e4长度:4 mm
负载电容(CL):15 pF逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.012 A湿度敏感等级:3
位数:4功能数量:1
端口数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC16/20,.14X.16,20封装形状:RECTANGULAR
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE包装方法:TR
峰值回流温度(摄氏度):260电源:1.5/3.3 V
最大电源电流(ICC):0.016 mAProp。Delay @ Nom-Sup:6.3 ns
传播延迟(tpd):11.3 ns认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:1 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.2 V标称供电电压 (Vsup):1.5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:1.5/3.3V &1.5/3.3V宽度:3.5 mm
Base Number Matches:1

74AVC4T245QRGYRQ1 数据手册

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SN74AVC4T245-Q1  
www.ti.com  
SCES792 NOVEMBER 2009  
4-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
Check for Samples: SN74AVC4T245-Q1  
1
FEATURES  
Qualified for Automotive Applications  
ESD Protection Exceeds JESD 22  
Control Inputs VIH/VIL Levels Are Referenced to  
VCCA Voltage  
8000-V Human-Body Model (A114-A)  
1000-V Charged-Device Model (C101)  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.2-V to  
3.6-V Power-Supply Range  
RGY PACKAGE  
(TOP VIEW)  
I/Os Are 4.6-V Tolerant  
Ioff Supports Partial Power-Down-Mode  
Operation  
1
16  
15  
14  
13  
12  
11  
10  
1DIR  
2DIR  
1A1  
1A2  
2A1  
2A2  
2
3
4
5
6
7
1OE  
2OE  
1B1  
1B2  
2B1  
2B2  
Maximum Data Rates  
380 Mbps (1.8-V to 3.3-V Translation)  
200 Mbps (<1.8-V to 3.3-V Translation)  
200 Mbps (Translate to 2.5 V or 1.8 V)  
150 Mbps (Translate to 1.5 V)  
Exposed  
Center  
Pad  
8
9
100 Mbps (Translate to 1.2 V)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
The exposed center pad, if used, must be connected  
only as a secondary GND or must be left electrically open.  
DESCRIPTION/ORDERING INFORMATION  
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed  
to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB  
accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVC4T245 is optimized to operate with VCCA/VCCB set  
at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage  
bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVC4T245 is designed for asynchronous communication between two data buses. The logic levels of  
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port  
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to  
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are  
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level  
applied to prevent excess ICC and ICCZ  
.
The SN74AVC4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA  
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance  
state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

74AVC4T245QRGYRQ1 替代型号

型号 品牌 替代类型 描述 数据表
V62/09618-01XE TI

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