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74AUP2G14

更新时间： 2024-11-11 06:31:51

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
18页	98K
描述
Low-power dual Schmitt trigger inverter

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74AUP2G14 数据手册

74AUP2G14

Low-power dual Schmitt trigger inverter

Rev. 02 — 3 July 2009

Product data sheet

1. General description

The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept

standard input signals. They are capable of transforming slowly changing input signals

into sharply deﬁned, jitter-free output signals.

This device ensures a very low static and dynamic power consumption across the entire

V_CCrange from 0.8 V to 3.6 V.

This device is fully speciﬁed for partial power-down applications using I_OFF. The I_OFF

circuitry disables the output, preventing the damaging backﬂow current through the device

when it is powered down.

The inputs switch at different points for positive and negative-going signals. The difference

between the positive voltage V_T+and the negative voltage V_T−is deﬁned as the input

hysteresis voltage V_H.

2. Features

I Wide supply voltage range from 0.8 V to 3.6 V

I High noise immunity

I ESD protection:

N HBM JESD22-A114E Class 3A exceeds 5000 V

N MM JESD22-A115-A exceeds 200 V

N CDM JESD22-C101C exceeds 1000 V

I Low static power consumption; I_CC= 0.9 µA (maximum)

I Latch-up performance exceeds 100 mA per JESD 78 Class II

I Inputs accept voltages up to 3.6 V

I Low noise overshoot and undershoot < 10 % of V_CC

I I_OFFcircuitry provides partial Power-down mode operation

I Multiple package options

I Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C

3. Applications

I Wave and pulse shaper

I Astable multivibrator

I Monostable multivibrator

12 3 4 5 6 7...18

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