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74AUP2G06GW PDF预览

74AUP2G06GW

更新时间: 2024-11-19 11:11:23
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
15页 242K
描述
Low-power dual inverter with open-drain outputProduction

74AUP2G06GW 数据手册

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74AUP2G06  
Low-power dual inverter with open-drain output  
Rev. 8 — 31 January 2022  
Product data sheet  
1. General description  
The 74AUP2G06 provides two inverting buffers with open-drain output. The output of the device  
is an open drain and can be connected to other open-drain outputs to implement active-LOW  
wired-OR or active-HIGH wired-AND functions.  
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times  
across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire VCC range  
from 0.8 V to 3.6 V.  
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
2. Features and benefits  
Wide supply voltage range from 0.8 V to 3.6 V  
High noise immunity  
Low static power consumption; ICC = 0.9 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78B Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F Class 3A. Exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 

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