5秒后页面跳转
74AUP2G06GM PDF预览

74AUP2G06GM

更新时间: 2024-11-19 11:11:23
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
15页 242K
描述
Low-power dual inverter with open-drain outputProduction

74AUP2G06GM 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:VSON,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.61
Is Samacsys:N系列:AUP/ULP/V
JESD-30 代码:R-PDSO-N6JESD-609代码:e3
长度:1.45 mm逻辑集成电路类型:INVERTER
湿度敏感等级:1功能数量:2
输入次数:1端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE峰值回流温度(摄氏度):260
传播延迟(tpd):21.3 ns认证状态:Not Qualified
座面最大高度:0.5 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1 mmBase Number Matches:1

74AUP2G06GM 数据手册

 浏览型号74AUP2G06GM的Datasheet PDF文件第2页浏览型号74AUP2G06GM的Datasheet PDF文件第3页浏览型号74AUP2G06GM的Datasheet PDF文件第4页浏览型号74AUP2G06GM的Datasheet PDF文件第5页浏览型号74AUP2G06GM的Datasheet PDF文件第6页浏览型号74AUP2G06GM的Datasheet PDF文件第7页 
74AUP2G06  
Low-power dual inverter with open-drain output  
Rev. 8 — 31 January 2022  
Product data sheet  
1. General description  
The 74AUP2G06 provides two inverting buffers with open-drain output. The output of the device  
is an open drain and can be connected to other open-drain outputs to implement active-LOW  
wired-OR or active-HIGH wired-AND functions.  
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times  
across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire VCC range  
from 0.8 V to 3.6 V.  
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
2. Features and benefits  
Wide supply voltage range from 0.8 V to 3.6 V  
High noise immunity  
Low static power consumption; ICC = 0.9 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78B Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F Class 3A. Exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 

与74AUP2G06GM相关器件

型号 品牌 获取价格 描述 数据表
74AUP2G06GM,132 NXP

获取价格

74AUP2G06 - Low-power dual inverter with open-drain output SON 6-Pin
74AUP2G06GN NXP

获取价格

Low-power dual inverter with open-drain output
74AUP2G06GN NEXPERIA

获取价格

Low-power dual inverter with open-drain outputProduction
74AUP2G06GS NEXPERIA

获取价格

Low-power dual inverter with open-drain outputProduction
74AUP2G06GS NXP

获取价格

Low-power dual inverter with open-drain output
74AUP2G06GW NXP

获取价格

Low-power dual inverter with open-drain output
74AUP2G06GW NEXPERIA

获取价格

Low-power dual inverter with open-drain outputProduction
74AUP2G07 NXP

获取价格

Low-power dual buffer with open-drain output
74AUP2G07 DIODES

获取价格

DUAL BUFFERS WITH OPEN DRAIN OUTPUTS
74AUP2G07DW-7 DIODES

获取价格

DUAL BUFFERS WITH OPEN DRAIN OUTPUTS