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74AUP1G17FZ4-7 PDF预览

74AUP1G17FZ4-7

更新时间： 2024-11-05 12:23:19
品牌 Logo 应用领域
美台 - DIODES 栅极逻辑集成电路光电二极管
页数 文件大小 规格书
11页 190K
描述
SINGLE SCHMITT-TRIGGER BUFFER

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中文翻译

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74AUP1G17FZ4-7 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：DFN
包装说明：VSON,针数：6
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：18 weeks风险等级：1.55
系列：AUP/ULP/VJESD-30 代码：R-PDSO-N6
JESD-609代码：e4长度：1.4 mm
逻辑集成电路类型：BUFFER湿度敏感等级：1
功能数量：1输入次数：1
端子数量：6最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：VSON封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, VERY THIN PROFILE峰值回流温度（摄氏度）：260
传播延迟（tpd）：20.1 ns座面最大高度：0.4 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：NO LEAD
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：1 mm
Base Number Matches：1

74AUP1G17FZ4-7 数据手册

 浏览型号74AUP1G17FZ4-7的Datasheet PDF文件第2页浏览型号74AUP1G17FZ4-7的Datasheet PDF文件第3页浏览型号74AUP1G17FZ4-7的Datasheet PDF文件第4页浏览型号74AUP1G17FZ4-7的Datasheet PDF文件第5页浏览型号74AUP1G17FZ4-7的Datasheet PDF文件第6页浏览型号74AUP1G17FZ4-7的Datasheet PDF文件第7页 
74AUP1G17  
SINGLE SCHMITT-TRIGGER BUFFER  
Description  
Pin Assignments  
The Advanced Ultra Low Power (AUP) CMOS logic family is designed  
for low power and extended battery life in portable applications.  
The AUP1G17 is a single 1-input Schmitt-trigger buffer gate with a  
push-pull output designed for operation over a power supply range of  
0.8V to 3.6V. The device is fully specified for partial power down  
applications using IOFF. The IOFF circuitry disables the output  
preventing damaging current backflow when the device is powered  
down.  
The gate performs the positive Boolean function:  
Y = A  
Features  
•
•
•
•
Advanced Ultra Low Power (AUP) CMOS  
Supply Voltage Range from 0.8V to 3.6V  
± 4 mA Output Drive at 3.0V  
Low Static power consumption  
ƒ
Icc < 0.9µA  
Low Dynamic Power Consumption  
CPD = 6pF (Typical at 3.6)  
•
•
ƒ
Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for  
Slower Input Rise and Fall Time. The hysteresis is typically  
250mV at Vcc = 3.0V  
•
•
I
OFF Supports Partial-Power-Down Mode Operation  
ESD Protection Exceeds JESD 22  
ƒ
ƒ
2000-V Human Body Model (A114-A)  
Applications  
Exceeds 1000-V Charged Device Model (C101C)  
•
•
•
Latch-Up Exceeds 100mA per JESD 78, Class II  
Range of Package Options SOT353, DFN1410, and DFN1010  
Leadless packages per JESD30E  
•
•
Suited for battery and low power needs  
Wide array of products such as:  
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
Tablets, E-readers  
ƒ
ƒ
DFN1010 denoted as X2-DFN1010-6  
DFN1014 denoted as X2-DFN1014-6  
Cell Phones, Personal Navigation / GPS  
MP3 players ,Cameras, Video Recorders  
PCs ultrabooks, notebooks, netbooks,  
Computer peripherals, hard drives, CD/DVD ROM  
TV, DVD, DVR, set top box  
•
•
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)  
Halogen and Antimony Free. “Green” Device (Note 3)  
Notes:  
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.  
2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.  
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and  
<1000ppm antimony compounds.  
Click here for ordering information, located at the end of datasheet  
1 of 11  
www.diodes.com  
August 2012  
© Diodes Incorporated  
74AUP1G17  
Document number: DS35153 Rev. 1 - 2  
1234567...11

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