5秒后页面跳转
74AUP1G06GW PDF预览

74AUP1G06GW

更新时间: 2024-09-27 04:00:55
品牌 Logo 应用领域
恩智浦 - NXP 栅极逻辑集成电路光电二极管
页数 文件大小 规格书
15页 79K
描述
Low-power inverter with open-drain output

74AUP1G06GW 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOT包装说明:1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5
针数:5Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.24
Is Samacsys:N系列:AUP/ULP/V
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2.05 mm负载电容(CL):30 pF
逻辑集成电路类型:INVERTER最大I(ol):0.0017 A
湿度敏感等级:1功能数量:1
输入次数:1端子数量:5
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:1.2/3.3 VProp。Delay @ Nom-Sup:21.3 ns
传播延迟(tpd):21.3 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1.25 mmBase Number Matches:1

74AUP1G06GW 数据手册

 浏览型号74AUP1G06GW的Datasheet PDF文件第2页浏览型号74AUP1G06GW的Datasheet PDF文件第3页浏览型号74AUP1G06GW的Datasheet PDF文件第4页浏览型号74AUP1G06GW的Datasheet PDF文件第5页浏览型号74AUP1G06GW的Datasheet PDF文件第6页浏览型号74AUP1G06GW的Datasheet PDF文件第7页 
74AUP1G06  
Low-power inverter with open-drain output  
Rev. 02 — 24 August 2006  
Product data sheet  
1. General description  
The 74AUP1G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device,  
superior to most advanced CMOS compatible TTL families.  
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire  
VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial Power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
The 74AUP1G06 provides the single inverting buffer with open-drain output. The output of  
the device is an open drain and can be connected to other open-drain outputs to  
implement active-LOW wired-OR or active-HIGH wired-AND functions.  
2. Features  
Wide supply voltage range from 0.8 V to 3.6 V  
High noise immunity  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114-D Class 3A exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101-C exceeds 1000 V  
Low static power consumption; ICC = 0.9 µA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation  
Multiple package options  
Specified from 40 °C to +85 °C and 40 °C to +125 °C  

74AUP1G06GW 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1GU04DCKR TI

功能相似

SINGLE INVERTER GATE

与74AUP1G06GW相关器件

型号 品牌 获取价格 描述 数据表
74AUP1G06GW,125 NXP

获取价格

74AUP1G06 - Low-power inverter with open-drain output TSSOP 5-Pin
74AUP1G06GW-Q100 NEXPERIA

获取价格

Low-power inverter with open-drain output
74AUP1G06GW-Q100,125 NXP

获取价格

Inverter, AUP/ULP/V Series, 1-Func, 1-Input, CMOS, PDSO5
74AUP1G06GX NEXPERIA

获取价格

Low-power inverter with open-drain outputProduction
74AUP1G06-Q100 NEXPERIA

获取价格

Low-power inverter with open-drain output
74AUP1G06SE-7 DIODES

获取价格

SINGLE INVERTER WITH OPEN DRAIN OUTPUT
74AUP1G07 NXP

获取价格

Low-power buffer with open-drain output
74AUP1G07 DIODES

获取价格

SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT
74AUP1G07_10 NXP

获取价格

Low-power buffer with open-drain output
74AUP1G07_11 NXP

获取价格

Low-power buffer with open-drain output