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74AUP1G06GN PDF预览

74AUP1G06GN

更新时间: 2024-01-26 17:39:46
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
15页 85K
描述
AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6

74AUP1G06GN 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP-5Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.24
Is Samacsys:N系列:AUP/ULP/V
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2.05 mm逻辑集成电路类型:INVERTER
湿度敏感等级:1功能数量:1
输入次数:1端子数量:5
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):21.3 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1.25 mmBase Number Matches:1

74AUP1G06GN 数据手册

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74AUP1G06  
Low-power inverter with open-drain output  
Rev. 04 — 10 June 2009  
Product data sheet  
1. General description  
The 74AUP1G06 provides the single inverting buffer with open-drain output. The output of  
the device is an open drain and can be connected to other open-drain outputs to  
implement active-LOW wired-OR or active-HIGH wired-AND functions.  
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire  
VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial Power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features  
I Wide supply voltage range from 0.8 V to 3.6 V  
I High noise immunity  
I Complies with JEDEC standards:  
N JESD8-12 (0.8 V to 1.3 V)  
N JESD8-11 (0.9 V to 1.65 V)  
N JESD8-7 (1.2 V to 1.95 V)  
N JESD8-5 (1.8 V to 2.7 V)  
N JESD8-B (2.7 V to 3.6 V)  
I ESD protection:  
N HBM JESD22-A114E Class 3A exceeds 5000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Low static power consumption; ICC = 0.9 µA (maximum)  
I Latch-up performance exceeds 100 mA per JESD 78 Class II  
I Inputs accept voltages up to 3.6 V  
I Low noise overshoot and undershoot < 10 % of VCC  
I IOFF circuitry provides partial Power-down mode operation  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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