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74AUC2G240DCURG4 PDF预览

74AUC2G240DCURG4

更新时间： 2024-11-24 04:00:55
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
12页 432K
描述
DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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74AUC2G240DCURG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：GREEN, PLASTIC, VSSOP-8针数：8
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.72Is Samacsys：N
控制类型：ENABLE LOW系列：AUC
JESD-30 代码：R-PDSO-G8JESD-609代码：e4
长度：2.3 mm负载电容（CL）：15 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.005 A
湿度敏感等级：1位数：1
功能数量：2端口数量：2
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：VSSOP封装等效代码：TSSOP8,.12,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：1.2/2.5 VProp。Delay @ Nom-Sup：3.3 ns
传播延迟（tpd）：3.3 ns认证状态：Not Qualified
座面最大高度：0.9 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：2 mm
Base Number Matches：1

74AUC2G240DCURG4 数据手册

 浏览型号74AUC2G240DCURG4的Datasheet PDF文件第2页浏览型号74AUC2G240DCURG4的Datasheet PDF文件第3页浏览型号74AUC2G240DCURG4的Datasheet PDF文件第4页浏览型号74AUC2G240DCURG4的Datasheet PDF文件第5页浏览型号74AUC2G240DCURG4的Datasheet PDF文件第6页浏览型号74AUC2G240DCURG4的Datasheet PDF文件第7页 
SN74AUC2G240  
DUAL BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES534C–DECEMBER 2003–REVISED JANUARY 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
•
•
•
Low Power Consumption, 10 µA at 1.8 V  
±8-mA Output Drive at 1.8 V  
•
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
ESD Protection Exceeds JESD 22  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
•
•
Sub-1-V Operable  
1000-V Charged-Device Model (C101)  
Max tpd of 1.8 ns at 1.8 V  
DCT PACKAGE  
(TOP VIEW)  
DCU PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
4 5  
GND  
2Y  
2A  
VCC  
1
2
3
4
8
7
6
5
1OE  
1A  
VCC  
2OE  
1Y  
1
2
3
4
8
7
6
5
1OE  
1A  
3 6  
2 7  
1 8  
1Y  
2OE  
1Y  
1A  
2OE  
VCC  
2Y  
1OE  
2A  
GND  
2Y  
GND  
2A  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This dual buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC  
operation.  
The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented receivers and transmitters.  
This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,  
the device passes data from the A input to the Y output. When OE is high, the outputs are in the  
high-impedance state.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SSOP – DCT  
Reel of 3000  
SN74AUC2G240YZPR  
_ _ _UK_  
–40°C to 85°C  
Reel of 3000  
Reel of 3000  
SN74AUC2G240DCTR  
SN74AUC2G240DCUR  
U40_ _ _  
UK_  
VSSOP – DCU  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...12

中文翻译

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74AUC2G240DCURG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUC2G240DCUR TI

完全替代

 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74AUC2G240DCTR TI

完全替代

 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74AUC2G240YZPR TI

完全替代

 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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