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74AUC1G240DBVRG4 PDF预览

74AUC1G240DBVRG4

更新时间： 2024-02-15 12:03:30
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
13页 487K
描述
SINGLE BUFFER/DRIVER WITH 3-STATE OUTPUT

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74AUC1G240DBVRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOT-23
包装说明：LSSOP, TSOP5/6,.11,37针数：5
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.6
控制类型：ENABLE LOW计数方向：UNIDIRECTIONAL
系列：AUCJESD-30 代码：R-PDSO-G5
JESD-609代码：e4长度：2.9 mm
负载电容（CL）：15 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.009 A湿度敏感等级：1
位数：1功能数量：1
端口数量：2端子数量：5
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：LSSOP
封装等效代码：TSOP5/6,.11,37封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：1.2/2.5 V
最大电源电流（ICC）：0.01 mAProp。Delay @ Nom-Sup：3.3 ns
传播延迟（tpd）：3.3 ns认证状态：Not Qualified
座面最大高度：1.45 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：TTL温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.95 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：1.6 mm

74AUC1G240DBVRG4 数据手册

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SN74AUC1G240  
SINGLE BUFFER/DRIVER  
WITH 3-STATE OUTPUT  
www.ti.com  
SCES384I–MARCH 2002–REVISED FEBRUARY 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
•
•
•
Low Power Consumption, 10-µA Max ICC  
±8-mA Output Drive at 1.8 V  
•
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
ESD Protection Exceeds JESD 22  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
•
•
Sub-1-V Operable  
1000-V Charged-Device Model (C101)  
Max tpd of 2.5 ns at 1.8 V  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
3
2
1
4
Y
VCC  
GND  
A
OE  
A
1
2
3
5
1
2
3
5
OE  
A
VCC  
5
VCC  
OE  
4
GND  
Y
4
Y
GND  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC  
operation.  
The SN74AUC1G240 is a single line driver with a 3-state output. The output is disabled when the output-enable  
(OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SOT (SOT-23) – DBV  
Reel of 3000  
SN74AUC1G240YZPR  
_ _ _UK_  
–40°C to 85°C  
Reel of 3000  
Reel of 3000  
SN74AUC1G240DBVR  
SN74AUC1G240DCKR  
U40_  
UK_  
SOT (SC-70) – DCK  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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