Datasheet > 74ALVCH374PY

74ALVCH374PY

更新时间： 2024-11-10 10:50:15

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
6页	89K
描述
SSOP-20, Tube

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74ALVCH374PY 数据手册

IDT74ALVCH374

3.3VCMOSOCTALPOSITIVEEDGE-TRIGGEREDD-TYPE

INDUSTRIALTEMPERATURERANGE

3.3V CMOS OCTAL POSITIVE

IDT74ALVCH374

EDGE-TRIGGERED D-TYPE

FLIP-FLOP WITH 3-STATE

OUTPUTS AND BUS-HOLD

DESCRIPTION:

FEATURES:

–

0.5 MICRON CMOS Technology

Thisoctalpostiveedge-triggeredD-typeflip-flopisbuiltusingadvanced

dual metal CMOS technology. The ALVCH374 device is particularly

suitableforimplementingbufferregisters,I/Oports,bidirectionalbusdrivers,

andworkingregisters.Onthepositivetransitionoftheclock(CLK)input,the

Qoutputs are settothe logiclevels atthe data (D)inputs.

Typical t (o) (Output Skew) < 250ps

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

VCC = 3.3V ±0.3V, Normal Range

–

= 2.7V to 3.6V, Extended Range

VCC = 2.5V ±0.2V

Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs

ineithera normallogicstate (highorlowlogiclevels)ora high-impedance

state.Inthehigh-impedancestate,theoutputsneitherloadnordrivethebus

lines significantly.The high-impedance state andincreaseddrive provide

thecapabilitytodrivebuslineswithoutinterfaceorpullupcomponents. OE

does notaffectinternaloperations ofthelatch.Olddatacanberetainedor

newdatacanbeenteredwhiletheoutputsareinthehigh-impedancestate.

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

Available in SOIC, SSOP, QSOP, and TSSOP packages

Drive Features for ALVCH374:

–

High Output Drivers: ±24mA

Suitable for heavy loads

The ALVCH374 has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

APPLICATIONS:

• 3.3V High Speed Systems

• 3.3Vandlowervoltagecomputingsystems

The ALVCH374 has a “bus-hold” which retains the inputs’ last state

wheneverthe inputbus goes toa highimpedance.This prevents floating

inputs andeliminates the needforpull-up/downresistors.

FUNCTIONALBLOCKDIAGRAM

CLK

¹D

¹Q

¹D

TO SEVEN OTHER CHANNELS

INDUSTRIAL TEMPERATURE RANGE

MARCH1999

1999 Integrated Device Technology, Inc.

DSC-4473/-

12 3 4 5 6

中文翻译

下载PDF

与74ALVCH374PY相关器件

型号	品牌	获取价格	描述	数据表
74ALVCH374Q	IDT	获取价格	QSOP-20, Tube
74ALVCH374SO	IDT	获取价格	SOIC-20, Tube
74ALVCHR162245PAG	IDT	获取价格	3.3V CMOS 16-BIT BUS TRANSCIEVER
74ALVCHR162245PAG8	IDT	获取价格	3.3V CMOS 16-BIT BUS TRANSCIEVER
74ALVCHR16245GRE4	TI	获取价格	16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCHR16245GRG4	TI	获取价格	16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCHR16245LRG4	TI	获取价格	16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCHR16245ZQLR	TI	获取价格	16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCHR16269AGRE4	TI	获取价格	12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS
74ALVCHR16269AVRE4	TI	获取价格	12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS