生命周期: | Obsolete | 零件包装代码: | TSSOP |
包装说明: | TSSOP, | 针数: | 56 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.27 | 其他特性: | WITH CLEAR AND CLOCK ENABLE |
系列: | ALVC/VCX/A | JESD-30 代码: | R-PDSO-G56 |
长度: | 14 mm | 逻辑集成电路类型: | BUS DRIVER |
位数: | 9 | 功能数量: | 2 |
端口数量: | 2 | 端子数量: | 56 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出特性: | 3-STATE | 输出极性: | TRUE |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
传播延迟(tpd): | 7.5 ns | 认证状态: | Not Qualified |
座面最大高度: | 1.2 mm | 最大供电电压 (Vsup): | 3.6 V |
最小供电电压 (Vsup): | 1.2 V | 标称供电电压 (Vsup): | 1.8 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子形式: | GULL WING |
端子节距: | 0.5 mm | 端子位置: | DUAL |
宽度: | 6.1 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74ALVCH16823DL | NXP |
获取价格 |
18-bit bus-interface D-type flip-flop with reset and enable 3-State | |
74ALVCH16823DL,112 | NXP |
获取价格 |
74ALVCH16823 - 18-bit bus-interface D-type flip-flop with reset and enable (3-State) SSOP | |
74ALVCH16823DL,118 | NXP |
获取价格 |
74ALVCH16823 - 18-bit bus-interface D-type flip-flop with reset and enable (3-State) SSOP | |
74ALVCH16823DL,512 | NXP |
获取价格 |
74ALVCH16823 - 18-bit bus-interface D-type flip-flop with reset and enable (3-State) SSOP | |
74ALVCH16823DL,518 | NXP |
获取价格 |
74ALVCH16823 - 18-bit bus-interface D-type flip-flop with reset and enable (3-State) SSOP | |
74ALVCH16823DLG4 | TI |
获取价格 |
18-Bit Bus-Interface Flip-Flop With 3-State Outputs 56-SSOP -40 to 85 | |
74ALVCH16823DLRG4 | TI |
获取价格 |
ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56, 0.300 INCH, GREEN, PLASTIC, SSO | |
74ALVCH16823DL-T | ETC |
获取价格 |
18-Bit D-Type Flip-Flop | |
74ALVCH16825 | NXP |
获取价格 |
18-bit buffer/driver 3-State | |
74ALVCH16825DGG | NEXPERIA |
获取价格 |
18-bit buffer/driver (3-State)Production |