74ALVCH16501DL

更新时间： 2024-09-16 12:19:55

品牌	Logo	应用领域
恩智浦 - NXP		总线收发器
页数	文件大小	规格书
18页	377K
描述
18-bit universal bus transceiver; 3-state

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74ALVCH16501DL 数据手册

74ALVCH16501

18-bit universal bus transceiver; 3-state

Rev. 03 — 2 April 2010

Product data sheet

1. General description

The 74ALVCH16501 is an 18-bit transceiver featuring non-inverting 3-state bus

compatible outputs in both send and receive directions. Data flow in each direction is

controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock

(CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent

mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a

HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on

the LOW-to HIGH transition of CPAB. When OEAB is HIGH, the outputs are active. When

OEAB is LOW, the outputs are in the high-impedance state.

Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The

output enables are complimentary (OEAB is active HIGH, and OEBA is active LOW.

To ensure the high-impedance state during power-up or power-down, OEBA should be

tied to V_CCthrough a pull-up resistor and OEAB should be tied to GND through a

pull-down resistor; the minimum value of the resistor is determined by the

current-sinking/current-sourcing capability of the driver.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic

level.

2. Features and benefits

Wide supply voltage range from 1.2 V to 3.6 V

Complies with JEDEC standard JESD8-B

CMOS low power consumption

Direct interface with TTL levels

Current drive ±24 mA at V_CC= 3.0 V

Universal bus transceiver with D-type latches and D-type flip-flops capable of

operating in transparent, latched or clocked mode

All inputs have bus hold circuitry

Output drive capability 50 Ω transmission lines at 85 °C

3-state non-inverting outputs for bus-oriented applications

12 3 4 5 6 7...18

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型号	品牌	获取价格	描述	数据表
74ALVCH16501DL,112	NXP	获取价格	74ALVCH16501 - 18-bit universal bus transceiver; 3-state SSOP 56-Pin
74ALVCH16501DL,118	NXP	获取价格	74ALVCH16501 - 18-bit universal bus transceiver; 3-state SSOP 56-Pin
74ALVCH16501DLG4	TI	获取价格	18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCH16501DLRG4	TI	获取价格	18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCH16501PAG8	IDT	获取价格	TSSOP-56, Reel
74ALVCH16501PF	IDT	获取价格	TVSOP-56, Tube
74ALVCH16501PF8	IDT	获取价格	TVSOP-56, Reel
74ALVCH16501PV	IDT	获取价格	SSOP-56, Tube
74ALVCH16501PVG	IDT	获取价格	SSOP-56, Tube
74ALVCH16501PVG8	IDT	获取价格	SSOP-56, Reel