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74ALVCF162834DLG4 PDF预览

74ALVCF162834DLG4

更新时间： 2024-11-19 12:50:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
14页 478K
描述
3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

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74ALVCF162834DLG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：GREEN, PLASTIC, SSOP-56针数：56
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.73Is Samacsys：N
控制类型：ENABLE LOW系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：18.415 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.018 A
湿度敏感等级：1位数：18
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP56,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：3.5 ns
传播延迟（tpd）：5.9 ns认证状态：Not Qualified
座面最大高度：2.79 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.3 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.49 mm
Base Number Matches：1

74ALVCF162834DLG4 数据手册

 浏览型号74ALVCF162834DLG4的Datasheet PDF文件第2页浏览型号74ALVCF162834DLG4的Datasheet PDF文件第3页浏览型号74ALVCF162834DLG4的Datasheet PDF文件第4页浏览型号74ALVCF162834DLG4的Datasheet PDF文件第5页浏览型号74ALVCF162834DLG4的Datasheet PDF文件第6页浏览型号74ALVCF162834DLG4的Datasheet PDF文件第7页 
SN74ALVCF162834  
3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES409B–AUGUST 2002–REVISED OCTOBER 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
NC  
NC  
GND  
NC  
•
•
•
•
•
•
Ideal for Use in PC133 Register DIMM  
Typical Output Skew . . . <250 ps  
VCC = 3.3 V ± 0.3 V . . . Normal Range  
VCC = 2.7 V to 3.6 V . . . Extended Range  
VCC = 2.5 V ± 0.2 V  
2
3
Y1  
GND  
Y2  
A1  
GND  
A2  
4
5
6
Y3  
A3  
7
V
CC  
V
CC  
Rail-to-Rail Output Swing for Increased Noise  
Margin  
8
Y4  
Y5  
Y6  
GND  
Y7  
Y8  
A4  
A5  
A6  
GND  
A7  
9
•
•
•
Balanced Output Drivers . . . ±18 mA  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Low Switching Noise  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
A8  
•
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Y9  
A9  
Y10  
Y11  
Y12  
GND  
Y13  
Y14  
Y15  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This 18-bit universal bus driver is designed for  
2.3-V to 3.6-V VCC operation.  
V
CC  
V
CC  
Data flow from  
A to Y is controlled by the  
Y16  
Y17  
GND  
Y18  
OE  
A16  
A17  
GND  
A18  
CLK  
GND  
output-enable (OE) input. The device operates in the  
transparent mode when the latch-enable (LE) input is  
low. When LE is high, the A data is latched if the  
clock (CLK) input is held at a high or low logic level. If  
LE is high, the A data is stored in the latch/flip-flop on  
the low-to-high transition of CLK. When OE is high,  
the outputs are in the high-impedance state.  
LE  
NC − No internal connection  
The ALVCF162834 has series damping resistors in the device output structure that reduce switching noise in  
128-MB and 256-MB SDRAM modules. Designed with a drive capability of ±18 mA, this device is a midway drive  
between the ALVC162834 (±12 mA) and ALVC16834 (±24 mA).  
The SN74ALVCF162834 is a faster version of the SN74ALVC162834. It is suitable for PC133 applications,  
particularly for SDRAM modules clocked at 133 MHz.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCF162834DL  
TOP-SIDE MARKING  
Tube  
SSOP - DL  
ALVCF162834  
Tape and reel  
SN74ALVCF162834DLR  
SN74ALVCF162834GR  
SN74ALVCF162834VR  
-40°C to 85°C  
TSSOP - DGG  
TVSOP - DGV  
Tape and reel  
Tape and reel  
ALVCF162834  
VF162834  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...14

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74ALVCF162835GRE4 TI

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 		3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
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