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74ALVC86MX PDF预览

74ALVC86MX

更新时间: 2024-11-16 23:24:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路石英晶振光电二极管
页数 文件大小 规格书
5页 74K
描述
Quad 2-input Exclusive OR (XOR) Gate

74ALVC86MX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.8
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.6235 mm
负载电容(CL):50 pF逻辑集成电路类型:XOR GATE
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:3.5 ns
传播延迟(tpd):7.8 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.753 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mm

74ALVC86MX 数据手册

 浏览型号74ALVC86MX的Datasheet PDF文件第2页浏览型号74ALVC86MX的Datasheet PDF文件第3页浏览型号74ALVC86MX的Datasheet PDF文件第4页浏览型号74ALVC86MX的Datasheet PDF文件第5页 
December 2001  
Revised December 2001  
74ALVC86  
Low Voltage Quad 2-Input Exclusive-OR Gate with  
3.6V Tolerant Inputs and Outputs  
General Description  
The ALVC86 contains four 2-input exclusive OR gates.  
Features  
1.65V to 3.6V VCC supply operation  
This product is designed for low voltage (1.65V to 3.6V)  
3.6V tolerant inputs and outputs  
tPD  
VCC applications with I/O compatibility up to 3.6V  
The 74ALVC86 is fabricated with an advanced CMOS  
technology to achieve high-speed operation while main-  
taining low CMOS power dissipation.  
3.5 ns max for 3.0V to 3.6V VCC  
4.4 ns max for 2.3V to 2.7V VCC  
7.8 ns max for 1.65V to 1.95V VCC  
Power-off high impedance inputs and outputs  
Uses patented Quiet Series noise/EMI reduction  
circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
Human body model > 2000V  
Machine model > 250V  
Ordering Code:  
Order Number Package Number  
Package Description  
74ALVC86M  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74ALVC86MTC  
MTC14  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
Description  
Inputs  
Outputs  
On  
Quiet Series is a trademark of Fairchild Semiconductor Corporation  
© 2001 Fairchild Semiconductor Corporation  
ds500718  
www.fairchildsemi.com  

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