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74ALVC86MTCX_NL PDF预览

74ALVC86MTCX_NL

更新时间: 2024-11-19 05:05:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路石英晶振光电二极管
页数 文件大小 规格书
5页 93K
描述
Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs

74ALVC86MTCX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, LEAD FREE, MO-153AB, TSSOP-14
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.74
Is Samacsys:N系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:XOR GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.5 ns传播延迟(tpd):7.8 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74ALVC86MTCX_NL 数据手册

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December 2001  
Revised March 2005  
74ALVC86  
Low Voltage Quad 2-Input Exclusive-OR Gate with  
3.6V Tolerant Inputs and Outputs  
General Description  
The ALVC86 contains four 2-input exclusive OR gates.  
Features  
1.65V to 3.6V VCC supply operation  
This product is designed for low voltage (1.65V to 3.6V)  
3.6V tolerant inputs and outputs  
tPD  
VCC applications with I/O compatibility up to 3.6V  
The 74ALVC86 is fabricated with an advanced CMOS  
technology to achieve high-speed operation while main-  
taining low CMOS power dissipation.  
3.5 ns max for 3.0V to 3.6V VCC  
4.4 ns max for 2.3V to 2.7V VCC  
7.8 ns max for 1.65V to 1.95V VCC  
Power-off high impedance inputs and outputs  
Uses patented Quiet Series noise/EMI reduction  
circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
Human body model 2000V  
Machine model 250V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74ALVC86M  
M14A  
MTC14  
MTC14  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74ALVC86MTC  
74ALVC86MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
Description  
Inputs  
Outputs  
On  
Quiet Series is a trademark of Fairchild Semiconductor Corporation  
© 2005 Fairchild Semiconductor Corporation  
DS500718  
www.fairchildsemi.com  

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