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74ALVC32BQ-G PDF预览

74ALVC32BQ-G

更新时间: 2024-11-06 13:01:31
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
13页 81K
描述
IC,LOGIC GATE,QUAD 2-INPUT OR,AVC/ALVC/VCX-CMOS,LLCC,14PIN,PLASTIC

74ALVC32BQ-G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:QCCN, LCC14,.1X.12,20Reach Compliance Code:unknown
风险等级:5.84JESD-30 代码:R-PQCC-N14
负载电容(CL):50 pF逻辑集成电路类型:OR GATE
最大I(ol):0.024 A端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LCC14,.1X.12,20封装形状:RECTANGULAR
封装形式:CHIP CARRIER电源:3.3 V
Prop。Delay @ Nom-Sup:2.8 ns认证状态:Not Qualified
施密特触发器:NO子类别:Gates
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUADBase Number Matches:1

74ALVC32BQ-G 数据手册

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74ALVC32  
Quad 2-input OR gate  
Rev. 02 — 10 December 2007  
Product data sheet  
1. General description  
The 74ALVC32 is a quad 2-input OR gate.  
Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.  
2. Features  
Wide supply voltage range from 1.65 V to 3.6 V  
3.6 V tolerant inputs/outputs  
CMOS low power consumption  
Direct interface with TTL levels (2.7 V to 3.6 V)  
Power-down mode  
Latch-up performance exceeds 250 mA  
Complies with JEDEC standards:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74ALVC32D  
40 °C to +85 °C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74ALVC32PW 40 °C to +85 °C  
74ALVC32BQ 40 °C to +85 °C  
TSSOP14  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
SOT402-1  
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1  
thin quad flat package; no leads; 14 terminals;  
body 2.5 × 3 × 0.85 mm  

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