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74ALVC245MTCX_NL PDF预览

74ALVC245MTCX_NL

更新时间: 2024-11-05 21:54:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路光电二极管
页数 文件大小 规格书
7页 102K
描述
Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs

74ALVC245MTCX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, LEAD FREE, MO-153, TSSOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.13
Is Samacsys:N控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.024 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:3.4 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:4.4 mmBase Number Matches:1

74ALVC245MTCX_NL 数据手册

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September 2001  
Revised March 2005  
74ALVC245  
Low Voltage Bidirectional Transceiver  
with 3.6V Tolerant Inputs and Outputs  
General Description  
Features  
1.65V to 3.6V VCC supply operation  
The ALVC245 contains eight non-inverting bidirectional  
buffers with 3-STATE outputs and is intended for bus ori-  
ented applications. The T/R input determines the direction  
of data flow. The OE input disables both the A and B ports  
by placing them in a high impedance state.  
3.6V tolerant inputs and outputs  
Power-off high impedance inputs and outputs  
Supports Live Insertion and Withdrawal (Note 1)  
tPD  
The 74ALVC245 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O compatibility up to 3.6V.  
3.4 ns max for 3.0V to 3.6V VCC  
3.9 ns max for 2.3V to 2.7V VCC  
6 ns max for 1.65V to 1.95V VCC  
The 74ALVC245 is fabricated with an advanced CMOS  
technology to achieve high-speed operation while main-  
taining low CMOS power dissipation.  
Uses patented Quiet Series noise/EMI reduction  
circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
Human body model 2000V  
Machine model 200V  
Note 1: To ensure the high impedance state during power up and power  
down, OE should be tied to V  
through a pull up resistor. The minimum  
CC  
n
value of the resistor is determined by the current sourcing capability of the  
driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74ALVC245WM  
74ALVC245MTC  
M20B  
MTC20  
MTC20  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74ALVC245MTCX_NL  
(Note 2)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OE  
Output Enable Input (Active LOW)  
Transmit/Receive Input  
T/R  
A0A7  
B0B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
Quiet Series is a trademark of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
DS500647  
www.fairchildsemi.com  

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