5秒后页面跳转
74ALVC16601MTD PDF预览

74ALVC16601MTD

更新时间: 2024-11-04 22:39:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 103K
描述
Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs

74ALVC16601MTD 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:unknown
风险等级:5.3Is Samacsys:N
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.024 A
湿度敏感等级:2位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.4 ns传播延迟(tpd):8.8 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

74ALVC16601MTD 数据手册

 浏览型号74ALVC16601MTD的Datasheet PDF文件第2页浏览型号74ALVC16601MTD的Datasheet PDF文件第3页浏览型号74ALVC16601MTD的Datasheet PDF文件第4页浏览型号74ALVC16601MTD的Datasheet PDF文件第5页浏览型号74ALVC16601MTD的Datasheet PDF文件第6页浏览型号74ALVC16601MTD的Datasheet PDF文件第7页 
October 2001  
Revised October 2001  
74ALVC16601  
Low Voltage 18-Bit Universal Bus Transceivers  
with 3.6V Tolerant Inputs and Outputs  
General Description  
The ALVC16601 is an 18-bit universal bus transceiver  
which combines D-type latches and D-type flip-flops to  
allow data flow in transparent, latched, and clocked modes.  
Features  
1.65V–3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
tPD (A to B, B to A)  
Data flow in each direction is controlled by output-enable  
(OEAB and OEBA), latch-enable (LEAB and LEBA), and  
clock (CLKAB and CLKBA) inputs. The clock can be con-  
trolled by the clock-enable (CLKENAB and CLKENBA)  
inputs. For A-to-B data flow, the device operates in the  
transparent mode when LEAB is HIGH. When LEAB is  
LOW, the A data is latched if CLKAB is held at a HIGH-to-  
LOW logic level. If LEAB is LOW, the A bus data is stored  
in the latch/flip-flop on the LOW-to-HIGH transition of  
CLKAB. When OEAB is LOW, the outputs are active. When  
OEAB is HIGH, the outputs are in the high-impedance  
state.  
3.4 ns max for 3.0V to 3.6V VCC  
4.0 ns max for 2.3V to 2.7V VCC  
7.0 ns max for 1.65V 1.95V VCC  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
Uses patented noise/EMI reduction circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
Human body model > 2000V  
Data flow for B to A is similar to that of A to B but uses  
OEBA, LEBA, CLKBA and CLKENBA.  
Machine model >200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
The ALVC16601 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V.  
(FBGA) (Preliminary)  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pull-up resistor; the minimum  
The ALVC16601 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74ALVC16601GX  
(Note 2)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74ALVC16601MTD  
(Note 3)  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 2: BGA package available in Tape and Reel only.  
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
© 2001 Fairchild Semiconductor Corporation  
DS500682  
www.fairchildsemi.com  

74ALVC16601MTD 替代型号

型号 品牌 替代类型 描述 数据表
74ALVC16601MTDX FAIRCHILD

完全替代

18-Bit Bus Transceiver

与74ALVC16601MTD相关器件

型号 品牌 获取价格 描述 数据表
74ALVC16601MTDX FAIRCHILD

获取价格

18-Bit Bus Transceiver
74ALVC16623DGG NXP

获取价格

IC ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver
74ALVC16623DGG-T NXP

获取价格

IC ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver
74ALVC16623DL ETC

获取价格

Dual 8-bit Bus Transceiver
74ALVC16646DGG NXP

获取价格

IC ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/T
74ALVC16646DGG-T NXP

获取价格

IC ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/T
74ALVC16646DL NXP

获取价格

IC ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/T
74ALVC16646DL-T NXP

获取价格

IC ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/T
74ALVC16652DGG ETC

获取价格

Dual 8-bit Bus Transceiver
74ALVC16652DL ETC

获取价格

Dual 8-bit Bus Transceiver