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74ALVC16373/D PDF预览

74ALVC16373/D

更新时间： 2024-11-08 23:24:03
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其他 - ETC 触发器
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12页 140K
描述
Low-Voltage 1.8/2.5/3.3 V 16-Bit D-TYpe Flip-Flop

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74ALVC16373/D 数据手册

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74ALVC16373  
Low-Voltage 1.8/2.5/3.3 V  
16-Bit Transparent Latch  
With 3.6 V–Tolerant Inputs and Outputs  
(3–State, Non–Inverting)  
The 74ALVC16373 is an advanced performance, non–inverting  
16–bit transparent latch. It is designed for very high–speed, very  
low–power operation in 1.8 V, 2.5 V or 3.3 V systems. The  
ALVC16373 is byte controlled, with each byte functioning identically,  
but independently. Each byte has separate Output Enable and Latch  
Enable inputs. These control pins can be tied together for full 16–bit  
operation.  
http://onsemi.com  
MARKING DIAGRAM  
48  
48  
The 74ALVC16373 contains 16 D–type latches with 3–state  
3.6 V–tolerant outputs. When the Latch Enable (LEn) inputs are  
HIGH, data on the Dn inputs enters the latches. In this condition, the  
latches are transparent, (a latch output will change state each time its D  
input changes). When LE is LOW, the latch stores the information that  
was present on the D inputs a setup time preceding the  
HIGH–to–LOW transition of LE. The 3–state outputs are controlled  
by the Output Enable (OEn) inputs. When OE is LOW, the outputs are  
enabled. When OE is HIGH, the standard outputs are in the high  
impedance state, but this does not interfere with new data entering into  
the latches.  
74ALVC16373DT  
AWLYYWW  
1
TSSOP–48  
DT SUFFIX  
CASE 1201  
1
= Assembly Location  
A
WL = Wafer Lot  
YY = Year  
WW = Work Week  
• Designed for Low Voltage Operation: V = 1.65–3.6 V  
CC  
• 3.6V Tolerant Inputs and Outputs  
• High Speed Operation: 3.6 ns max for 3.0 to 3.6 V  
4.5 ns max for 2.3 to 2.7 V  
PIN NAMES  
Pins  
Function  
OEn  
LEn  
D0–D15  
O0–O15  
Output Enable Inputs  
Latch Enable Inputs  
Inputs  
6.8 ns max for 1.65 to 1.95 V  
• Static Drive: ±24 mA Drive at 3.0 V  
±12 mA Drive at 2.3 V  
Outputs  
±4 mA Drive at 1.65 V  
• Supports Live Insertion and Withdrawal  
†
• I  
Specification Guarantees High Impedance When V = 0 V  
OFF  
CC  
• Near Zero Static Supply Current in All Three Logic States (40 mA)  
Substantially Reduces System Power Requirements  
ORDERING INFORMATION  
• Latchup Performance Exceeds ±250 mA @ 125°C  
• ESD Performance: Human Body Model >2000 V; Machine Model  
>200 V  
Device  
Package  
Shipping  
74ALVC16373DTR TSSOP 2500/Tape & Reel  
• Second Source to Industry Standard 74ALVC16373  
†To ensure the outputs activate in the 3–state condition, the output enable pins  
should be connected to V through a pull–up resistor. The value of the resistor is  
CC  
determined by the current sinking capability of the output connected to the OE pin.  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
July, 2002 – Rev. 0  
74ALVC16373/D  
1234567...12

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 		Low-Voltage 1.8/2.5/3.3 V 16 Bit D-Type Flip-Flop

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