Datasheet > 74ALVC162835TX

74ALVC162835TX

更新时间： 2024-11-08 23:24:03

品牌	Logo	应用领域
其他 - ETC		驱动器
页数	文件大小	规格书
7页	82K
描述
18-Bit Buffer/Driver

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数据手册

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74ALVC162835TX 数据手册

September 2001

Revised September 2001

74ALVC162835

Low Voltage 18-Bit Universal Bus Driver

with 3.6V Tolerant Inputs/Outputs

and 26Ω Series Resistors in Outputs

General Description

The ALVC162835 low voltage 18-bit universal bus driver

combines D-type latches and D-type flip-flops to allow data

flow in transparent, latched and clocked modes.

Features

I Compatible with PC100 DIMM module specifications

I 1.65V–3.6V V_CCspecifications provided

I 3.6V tolerant inputs and outputs

I 26Ω series resistors in outputs

I t_PD(CLK to O_n)

Data flow is controlled by output-enable (OE), latch-enable

(LE), and clock (CLK) inputs. The device operates in

Transparent Mode when LE is held HIGH. The device

operates in clocked mode when LE is LOW and CLK is tog-

gled. Data transfers from the Inputs (I_n) to Outputs (O_n) on

5.4 ns max for 3.0V to 3.6V V_CC

6.3 ns max for 2.3V to 2.7V V_CC

9.2 ns max for 1.65V to 1.95V V_CC

a Positive Edge Transition of the Clock. When OE is LOW,

the output data is enabled. When OE is HIGH the output

port is in a high impedance state.

I Power-down high impedance inputs and outputs

I Supports live insertion/withdrawal (Note 1)

I Latchup conforms to JEDEC JED78

I ESD performance:

The ALVC162835 is designed with 26Ω series resistors in

the outputs. This design reduces noise in applications such

as memory address drivers, clock drivers, and bus trans-

ceivers/transmitters.

Human body model > 2000V

The 74ALVC162835 is designed for low voltage (1.65V to

3.6V) V_CCapplications with I/O capability up to 3.6V.

Machine model >200V

Note 1: To ensure the high impedance state during power up or power

down, OE should be tied to V_CCthrough a pulldown resistor; the minimum

The 74ALVC162835 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

value of the resistor is determined by the current sourcing capability of the

driver.

Ordering Code:

Package

Order Number

Package Description

Number

74ALVC162835T

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

DS500646

www.fairchildsemi.com

12 3 4 5 6 7

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与74ALVC162835TX相关器件

型号	品牌	获取价格	描述	数据表
74ALVC162836A	NXP	获取价格	20-bit registered driver with inverted register enable and 30ohm termination resistors 3-S
74ALVC162836A_0006	NXP	获取价格	20-bit registered driver with inverted register enable and 30ohm termination resistors 3-S
74ALVC162836ADGG	NXP	获取价格	20-bit registered driver with inverted register enable and 30ohm termination resistors 3-S
74ALVC162836ADGG-T	NXP	获取价格	IC ALVC/VCX/A SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, SOT-364, TSSOP2-56, Bus
74ALVC162836DGGRE4	TI	获取价格	20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
74ALVC162836DGVRE4	TI	获取价格	20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
74ALVC162836DLG4	TI	获取价格	20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
74ALVC162836DLRG4	TI	获取价格	20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
74ALVC162838	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer
74ALVC162838T	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer

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