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74ALVC16245DL-T PDF预览

74ALVC16245DL-T

更新时间: 2024-11-07 08:35:51
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
17页 97K
描述
IC ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 7.50MM, PLASTIC, MO-118, SOT-370-1, SSOP-48, Bus Driver/Transceiver

74ALVC16245DL-T 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:unknown风险等级:5.05
其他特性:WITH DIRECTION CONTROL系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER湿度敏感等级:1
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):3.7 ns
认证状态:Not Qualified座面最大高度:2.8 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

74ALVC16245DL-T 数据手册

 浏览型号74ALVC16245DL-T的Datasheet PDF文件第2页浏览型号74ALVC16245DL-T的Datasheet PDF文件第3页浏览型号74ALVC16245DL-T的Datasheet PDF文件第4页浏览型号74ALVC16245DL-T的Datasheet PDF文件第5页浏览型号74ALVC16245DL-T的Datasheet PDF文件第6页浏览型号74ALVC16245DL-T的Datasheet PDF文件第7页 
74ALVC16245; 74ALVCH16245  
16-bit transceiver with direction pin; 3-state  
Rev. 03 — 12 May 2004  
Product data sheet  
1. General description  
The 74ALVC16245; 74ALVCH16245 is a 16-bit transceiver featuring non-inverting 3-state  
bus compatible outputs in both send and receive directions.  
The 74ALVC16245; 74ALVCH16245 features two output enable inputs (pins nOE) for  
easy cascading and two send or receive inputs (pins nDIR) for direction control. Pins nOE  
control the outputs so that the buses are effectively isolated. This device can be used as  
two 8-bit transceivers or one 16-bit transceiver.  
The 74ALVCH16245 has an active bushold circuitry which is provided to hold unused or  
floating data inputs at a valid logic level. This feature eliminates the need for external  
pull-up or pull-down resistors.  
2. Features  
Wide supply voltage range from 1.2 V to 3.6 V  
Complies with JEDEC standard JESD8-B  
CMOS low power consumption  
MULTIBYTE flow-through standard pin-out architecture  
Low inductance multiple VCC and GND pins for minimize noise and ground bounce  
Direct interface with TTL levels  
All data inputs have bushold (74ALVCH16245 only)  
Output drive capability 50 transmission lines at 85 °C  
Current drive ±24 mA at VCC = 3.0 V.  

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