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74ALVC16244MTD PDF预览

74ALVC16244MTD

更新时间: 2024-11-10 15:18:55
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
7页 208K
描述
Low Voltage 1.8/2.5/3.3V 16-Bit Buffer

74ALVC16244MTD 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:TSSOP, TSSOP48,.3,20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.97控制类型:ENABLE LOW
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
JESD-609代码:e4长度:12.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:2
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:3 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74ALVC16244MTD 数据手册

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DATA SHEET  
www.onsemi.com  
Low-Voltage 16-Bit  
Buffer/Line Driver with 3.6 V  
Tolerant Inputs and Outputs  
48  
1
TSSOP48 12.5x6.1  
CASE 948BQ  
74ALVC16244  
General Description  
MARKING DIAGRAM  
The ALVC16244 contains sixteen noninverting buffers with  
3STATE outputs to be employed as a memory and address driver,  
clock driver, or bus oriented transmitter/receiver. The device is nibble  
(4bit) controlled. Each nibble has separate 3STATE control inputs  
which can be shorted together for full 16bit operation.  
The 74ALVC16244 is designed for low voltage (1.65 V to 3.6 V)  
48  
74ALVC16244  
AWLYYWW  
V
CC  
applications with I/O capability up to 3.6 V.  
The 74ALVC16244 is fabricated with an advanced CMOS  
1
technology to achieve high speed operation while maintaining low  
CMOS power dissipation.  
A
WL  
YY  
= Assembly Location  
= Wafer Lot  
= Year  
Features  
WW  
= Work Week  
1.65 V 3.6 V V Supply Operation  
CC  
3.6 V Tolerant Inputs and Outputs  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
t  
PD  
3.0 ns max for 3.0 V to 3.6 V V  
CC  
3.5 ns max for 2.3 V to 2.7 V V  
CC  
6.0 ns max for 1.65 V to 1.95 V V  
CC  
Poweroff High Impedance Inputs and Outputs  
Supports Live Insertion and Withdrawal*  
Uses Patented Noise/EMI Reduction Circuitry  
Latchup conforms to JEDEC JED98  
ESD Performance:  
Human Body Model >2000 V  
Machine Model >200 V  
These are PbFree Devices  
*To ensure the highimpedance state during power up or power down, OE should  
be tied to V through a pullup resistor; the minimum value of the resistor is  
CC  
determined by the currentsourcing capability of the driver.  
Figure 1. Logic Symbol  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2023 Rev. 2  
74ALVC16244/D  

74ALVC16244MTD 替代型号

型号 品牌 替代类型 描述 数据表
74ALVC16244MTDX ONSEMI

完全替代

Low Voltage 1.8/2.5/3.3V 16-Bit Buffer
74VCX16244MTDX FAIRCHILD

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