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74ALVC162334DGGRE4

更新时间： 2024-10-02 05:05:47
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
13页 308K
描述
16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

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74ALVC162334DGGRE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP48,.3,20针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.42Is Samacsys：N
控制类型：ENABLE LOW系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G48JESD-609代码：e4
长度：12.5 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.012 A湿度敏感等级：1
位数：16功能数量：1
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：3.3 V
Prop。Delay @ Nom-Sup：3.9 ns传播延迟（tpd）：5.4 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

74ALVC162334DGGRE4 数据手册

 浏览型号74ALVC162334DGGRE4的Datasheet PDF文件第2页浏览型号74ALVC162334DGGRE4的Datasheet PDF文件第3页浏览型号74ALVC162334DGGRE4的Datasheet PDF文件第4页浏览型号74ALVC162334DGGRE4的Datasheet PDF文件第5页浏览型号74ALVC162334DGGRE4的Datasheet PDF文件第6页浏览型号74ALVC162334DGGRE4的Datasheet PDF文件第7页 
SN74ALVC162334  
16-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES127E–FEBRUARY 1998–REVISED OCTOBER 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
1
48  
47  
46  
45  
44  
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42  
41  
40  
39  
38  
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36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
•
•
•
•
•
Ideal for Use in PC100 Register DIMM  
Operates From 1.65 V to 3.6 V  
Max tpd of 3.8 ns at 3.3 V  
OE  
Y1  
CLK  
A1  
2
3
Y2  
GND  
Y3  
A2  
GND  
A3  
4
±12-mA Output Drive at 3.3 V  
5
Output Ports Have Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
6
Y4  
A4  
7
V
CC  
V
CC  
8
Y5  
Y6  
GND  
Y7  
Y8  
Y9  
A5  
A6  
GND  
A7  
A8  
•
•
•
Designed to Comply With JEDEC 168-Pin and  
200-Pin SDRAM Buffered DIMM Specification  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
A9  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Y10  
GND  
Y11  
Y12  
A10  
GND  
A11  
A12  
– 1000-V Charged-Device Model (C101)  
V
CC  
V
CC  
DESCRIPTION/ORDERING INFORMATION  
Y13  
Y14  
GND  
Y15  
Y16  
NC  
A13  
A14  
GND  
A15  
A16  
LE  
This 16-bit universal bus driver is designed for 1.65-V  
to 3.6-V VCC operation.  
Data flow from  
A to Y is controlled by the  
output-enable (OE) input. The device operates in the  
transparent mode when the latch-enable (LE) input is  
low. When LE is high, the A data is latched if the  
clock (CLK) input is held at a high or low logic level. If  
LE is high, the A data is stored in the latch/flip-flop on  
the low-to-high transition of CLK. When OE is high,  
the outputs are in the high-impedance state.  
NC − No internal connection  
The outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot and  
undershoot.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVC162334DL  
TOP-SIDE MARKING  
Tube  
SSOP - DL  
ALVC162334  
Tape and reel  
SN74ALVC162334DLR  
-40°C to 85°C  
TSSOP - DGG  
TVSOP - DGV  
Tape and reel  
Tape and reel  
SN74ALVC162334DGGR  
SN74ALVC162334DGVR  
ALVC162334  
VC2334  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...13

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