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74ALVC162244

更新时间: 2024-10-01 22:56:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
8页 101K
描述
Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26з Series Resistor in Outputs

74ALVC162244 数据手册

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November 2001  
Revised November 2001  
74ALVC162244  
Low Voltage 16-Bit Buffer/Line Driver  
with 3.6V Tolerant Inputs and Outputs  
and 26Series Resistor in Outputs  
General Description  
The ALVC162244 contains sixteen non-inverting buffers  
with 3-STATE outputs to be employed as a memory and  
Features  
1.65V to 3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
address driver, clock driver, or bus oriented transmitter/  
receiver. The device is nibble (4-bit) controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
26series resistors in outputs  
tPD  
The 74ALVC162244 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V. The  
3.8 ns max for 3.0V to 3.6V VCC  
4.3 ns max for 2.3V to 2.7V VCC  
7.6 ns max for 1.65V to 1.95V VCC  
74ALVC162244 is also designed with 26series resistors  
in the outputs. This design reduces line noise in applica-  
tions such as memory address drivers, clock drivers, and  
bus transceivers/transmitters.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal  
Uses patented noise/EMI reduction circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
The 74ALVC162244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA)  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pull-up resistor; the minimum  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74ALVC162244GX  
(Note 2)  
BGA54A  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74ALVC162244T  
(Note 3)  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 2: BGA package available in Tape and Reel only.  
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
© 2001 Fairchild Semiconductor Corporation  
DS500696  
www.fairchildsemi.com  

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