Datasheet > 74AHCT257-Q100

74AHCT257-Q100

更新时间： 2024-11-08 01:02:15

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
17页	706K
描述
Quad 2-input multiplexer; 3-state

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74AHCT257-Q100 数据手册

74AHC257-Q100;

74AHCT257-Q100

Quad 2-input multiplexer; 3-state

Rev. 1 — 22 July 2013

Product data sheet

1. General description

The 74AHC257-Q100; 74AHCT257-Q100 is a high-speed Si-gate CMOS device and is

pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with

JEDEC standard No. 7-A.

The 74AHC257-Q100; 74AHCT257-Q100 has four identical 2-input multiplexers with

3-state outputs. They select 4 bits of data from two sources and a common data select

input (S) controls them. The data inputs from source 0 (1I0 to 4I0), are selected when

input S is LOW. The data inputs from source 1 (1I1 to 4I1) are selected when input S is

HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the

selected inputs. The 74AHC257-Q100; 74AHCT257-Q100 is the logic implementation of a

4-pole 2-position switch. The logic levels applied to input S determine the position of the

switch. The outputs are forced to a high-impedance OFF-state when OE is HIGH.

The logic equations for the outputs are:

1Y = OE (1I1 S + 1I0 S)

2Y = OE (2I1 S + 2I0 S)

3Y = OE (3I1 S + 3I0 S)

4Y = OE (4I1 S + 4I0 S)

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Balanced propagation delays

 All inputs have Schmitt-trigger actions

 Non-inverting data path

 Inputs accept voltages higher than V_CC

 Input levels:

 For 74AHC257-Q100: CMOS level

 For 74AHCT257-Q100: TTL level

12 3 4 5 6 7...17

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