Datasheet > 74AHCT245-Q100

74AHCT245-Q100

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74AHCT245-Q100 数据手册

74AHC245-Q100;

74AHCT245-Q100

Octal bus transceiver; 3-state

Rev. 1 — 21 March 2013

Product data sheet

1. General description

The 74AHC245-Q100; 74AHCT245-Q100 is a high-speed Si-gate CMOS device.

The 74AHC245-Q100; 74AHCT245-Q100 is an octal transceiver featuring non-inverting

3-state bus compatible outputs in both send and receive directions.

The 74AHC245-Q100; 74AHCT245-Q100 features an output enable input (OE), for easy

cascading, and a send and receive direction control input (DIR).

OE controls the outputs so that the buses are effectively isolated.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Balanced propagation delays

 All inputs have Schmitt-trigger actions

 Inputs accept voltages higher than V_CC

 Input levels:

 For 74AHC245-Q100: CMOS level

 For 74AHCT245-Q100: TTL level

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

12 3 4 5 6 7...17

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