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74AHCT139PW,112 PDF预览

74AHCT139PW,112

更新时间: 2024-11-20 14:47:03
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
14页 75K
描述
74AHC(T)139 - Dual 2-to-4 line decoder/demultiplexer TSSOP 16-Pin

74AHCT139PW,112 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.14
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):11.5 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

74AHCT139PW,112 数据手册

 浏览型号74AHCT139PW,112的Datasheet PDF文件第2页浏览型号74AHCT139PW,112的Datasheet PDF文件第3页浏览型号74AHCT139PW,112的Datasheet PDF文件第4页浏览型号74AHCT139PW,112的Datasheet PDF文件第5页浏览型号74AHCT139PW,112的Datasheet PDF文件第6页浏览型号74AHCT139PW,112的Datasheet PDF文件第7页 
74AHC139; 74AHCT139  
Dual 2-to-4 line decoder/demultiplexer  
Rev. 02 — 9 May 2008  
Product data sheet  
1. General description  
The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard  
No. 7-A.  
The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This  
device has two independent decoders, each accepting two binary weighted inputs (nA0  
and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each  
decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced  
HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer  
application.  
The 74AHC139; 74AHCT139 is identical to the HEF4556 of the HE4000B family.  
2. Features  
I Balanced propagation delays  
I All inputs have Schmitt-trigger actions  
I Inputs accept voltages higher than VCC  
I Input levels:  
N For 74AHC139: CMOS level  
N For 74AHCT139: TTL level  
I ESD protection:  
N HBM EIA/JESD22-A114E exceeds 2000 V  
N MM EIA/JESD22-A115-A exceeds 200 V  
N CDM EIA/JESD22-C101C exceeds 1000 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AHC139  
74AHC139D  
40 °C to +125 °C  
40 °C to +125 °C  
SO16  
plastic small outline package; 16 leads;  
body width 3.9 mm  
SOT109-1  
SOT403-1  
74AHC139PW  
TSSOP16  
plastic thin shrink small outline package; 16 leads;  
body width 4.4 mm  
 
 
 

74AHCT139PW,112 替代型号

型号 品牌 替代类型 描述 数据表
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