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74AHC3GU04DC PDF预览

74AHC3GU04DC

更新时间: 2024-01-16 12:38:39
品牌 Logo 应用领域
恩智浦 - NXP 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
17页 95K
描述
high-speed Si-gate CMOS device

74AHC3GU04DC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:VSSOP, TSSOP8,.12,20针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.49Is Samacsys:N
系列:AHC/VHC/H/U/VJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:2.3 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:3输入次数:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装等效代码:TSSOP8,.12,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):13.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:2 mmBase Number Matches:1

74AHC3GU04DC 数据手册

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74AHC3GU04  
Inverter  
Rev. 01 — 5 March 2004  
Product data sheet  
1. General description  
The 74AHC3GU04 is a high-speed Si-gate CMOS device. This device provides the  
inverting single stage function.  
2. Features  
Symmetrical output impedance  
High noise immunity  
ESD protection:  
HBM EIA/JESD22-A114-A exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V  
CDM EIA/JESD22-C101 exceeds 1000 V.  
Low power dissipation  
Balanced propagation delays  
SOT505-2 and SOT765-1 package  
Output capability ±8 mA drive  
Specified from 40 °C to +85 °C and from 40 °C to +125 °C.  
3. Quick reference data  
Table 1:  
Quick reference data  
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
tPHL, tPLH  
propagation delay nA to nY VCC = 5 V;  
CL = 15 pF  
-
2.5  
5.5  
ns  
CI  
input capacitance  
-
-
3.0  
4
10  
-
pF  
pF  
[1]  
[2]  
CPD  
power dissipation  
capacitance  
[1] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in Volts;  
N = total load switching outputs;  
Σ(CL × VCC2 × fo) = sum of the outputs.  
[2] The condition is VI = GND to VCC  
.

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