Datasheet > 74AHC373_08

74AHC373_08

更新时间： 2024-09-24 08:02:59

品牌	Logo	应用领域
恩智浦 - NXP		锁存器
页数	文件大小	规格书
17页	100K
描述
Octal D-type transparant latch; 3-state

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74AHC373_08 数据手册

74AHC373; 74AHCT373

Octal D-type transparant latch; 3-state

Rev. 03 — 20 May 2008

Product data sheet

1. General description

The 74AHC373; 74AHCT373 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard

No. 7-A.

The 74AHC373; 74AHCT373 consists of eight D-type transparent latches featuring

separate D-type inputs for each latch and 3-state true outputs for bus oriented

applications. A latch enable input (LE) and an output enable input (OE) are common to all

latches.

When pin LE is HIGH, data at the Dn inputs enters the latches. In this condition the

latches are transparent, i.e. a latch output will change state each time its corresponding

Dn input changes. When pin LE is LOW, the latches store the information that is present

at the Dn inputs, after a set-up time preceding the HIGH-to-LOW transition of LE.

When pin OE is LOW, the contents of the 8 latches are available at the outputs. When

pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE

input does not affect the state of the latches.

The 74AHC373; 74AHCT373 is functionally identical to the 74AHC573; 74AHCT573, but

has a different pin arrangement.

2. Features

I Balanced propagation delays

I All inputs have a Schmitt-trigger action

I Common 3-state output enable input

I Inputs accepts voltages higher than V_CC

I Functionally identical to the 74AHC573; 74AHCT573

I Input levels:

N For 74AHC373: CMOS input level

N For 74AHCT373: TTL input level

I ESD protection:

N HBM EIA/JESD22-A114E exceeds 2000 V

N MM EIA/JESD22-A115-A exceeds 200 V

N CDM EIA/JESD22-C101C exceeds 1000 V

I Multiple package options

I Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

12 3 4 5 6 7...17

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与74AHC373_08相关器件

型号	品牌	获取价格	描述	数据表
74AHC373D	NEXPERIA	获取价格	Octal D-type transparant latch; 3-stateProduction
74AHC373D	NXP	获取价格	Octal D-type transparent latch; 3-state
74AHC373D-T	NXP	获取价格	IC AHC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013AC, SOT-163-1, S
74AHC373PW	NXP	获取价格	Octal D-type transparent latch; 3-state
74AHC373PW	NEXPERIA	获取价格	Octal D-type transparant latch; 3-stateProduction
74AHC373PW,112	NXP	获取价格	74AHC(T)373 - Octal D-type transparent latch; 3-state TSSOP2 20-Pin
74AHC373PW,118	NXP	获取价格	74AHC(T)373 - Octal D-type transparent latch; 3-state TSSOP2 20-Pin
74AHC373PWDH	NXP	获取价格	Octal D-type transparent latch; 3-state
74AHC374	NXP	获取价格	Octal D-type flip-flop; positive edge-trigger; 3-state
74AHC374D	NXP	获取价格	Octal D-type flip-flop; positive edge-trigger; 3-state