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74AHC1G09

更新时间： 2024-11-24 22:40:59

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
11页	64K
描述
2-input AND gate with open-drain output

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74AHC1G09 数据手册

74AHC1G09

2-input AND gate with open-drain output

Rev. 01 — 26 September 2005

Product data sheet

1. General description

The 74AHC1G09 is a high-speed Si-gate CMOS device.

The 74AHC1G09 provides the 2-input AND function with open-drain output.

The output of the 74AHC1G09 is an open drain and can be connected to other open-drain

outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For

digital operation this device must have a pull-up resistor to establish a logic HIGH level.

2. Features

■ High noise immunity

■ ESD protection:

◆ HBM JESD22-A114-C exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V

■ Low power dissipation

■ Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C.

3. Quick reference data

Table 1:

Quick reference data

GND = 0 V; T_amb= 25 °C; t_r= t_f≤ 3.0 ns.

Symbol

Parameter

Conditions

Min Typ Max Unit

t_PZL, t_PLZ

propagation delay

A and B to Y

V_CC= 4.5 V to 5.5 V;

C_L= 15 pF

3.2

5.5

C_i

input capacitance

1.5

[1]

C_PD

power dissipation

capacitance

C_L= 50 pF; f_i= 1 MHz;

V_I= GND to V_CC

[1] C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i× N + (C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

N = number of inputs switching;

(C_L× V_CC²× f_o) = dissipation due to the output if the combination of the pull up voltage and resistance

results in V_CCat the output.

12 3 4 5 6 7...11

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