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74ACTQ821SC PDF预览

74ACTQ821SC

更新时间: 2024-11-01 22:25:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 70K
描述
Quiet Seriesa⑩ 10-Bit D-Type Flip-Flop with 3-STATE Outputs

74ACTQ821SC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.300 INCH, MS-013, SOIC-24
针数:24Reach Compliance Code:compliant
风险等级:5.39Is Samacsys:N
系列:ACTJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.4 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:110000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP24,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

74ACTQ821SC 数据手册

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March 1990  
Revised November 1998  
74ACTQ821  
Quiet Series 10-Bit D-Type Flip-Flop  
with 3-STATE Outputs  
General Description  
Features  
Guaranteed simultaneous switching noise level and  
The ACTQ821 is a 10-bit D-type flip-flop with non-inverting  
3-STATE outputs arranged in a broadside pinout. The  
ACTQ821 utilizes Fairchild’s Quiet Series technology to  
guarantee quiet output switching and improved dynamic  
threshold performance. FACT Quiet Series  
GTO output control and undershoot corrector in addition  
to a split ground bus for superior performance.  
dynamic threshold performance  
Guaranteed pin-to-pin skew AC performance  
Non-inverting 3-STATE outputs for bus interfacing  
4 kV minimum ESD immunity  
features  
Outputs source/sink 24 mA  
Functionally identical to the AM29821  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACTQ821SC  
M24B  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide  
74ACTQ821SPC  
N24C  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
Pin Assignment  
for DIP and SOIC  
IEEE/IEC  
Pin Descriptions  
Pin Names  
D0–D9  
Description  
Data Inputs  
O0–O9  
OE  
Data Outputs  
Output Enable Input  
Clock Input  
CP  
FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010686.prf  
www.fairchildsemi.com  

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