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74ACTQ652SCX_NL PDF预览

74ACTQ652SCX_NL

更新时间: 2024-11-01 21:17:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 104K
描述
Registered Bus Transceiver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.300 INCH, LEAD FREE, MS-013, SOIC-24

74ACTQ652SCX_NL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:24
Reach Compliance Code:unknown风险等级:5.73
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION系列:ACT
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.4 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

74ACTQ652SCX_NL 数据手册

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June 1991  
Revised September 2000  
74ACTQ652  
Quiet Series Transceiver/Register  
General Description  
Features  
The ACTQ652 consists of bus transceiver circuits with D-  
type flip-flops, and control circuitry arranged for multiplexed  
transmission of data directly from the input bus or from  
internal registers. Data on the A or B bus will be clocked  
into the registers as the appropriate clock pin goes to the  
HIGH logic level. Output Enable pins (OEAB, OEBA) are  
provided to control the transceiver function.  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin skew AC performance  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
Outputs source/sink 24 mA  
TTL-compatible inputs  
The ACTQ652 utilizes Fairchild FACT Quiet Series tech-  
nology to guarantee quiet output switching and improved  
dynamic threshold performance. FACT Quiet Series fea-  
tures GTO output control and undershoot corrector in  
addition to split ground bus for superior performance.  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACTQ652SC  
74ACTQ652MTC  
74ACTQ652SPC  
M24B  
MTC24  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
A0A7, B0B7  
CPAB, CPBA  
SAB, SBA  
A and B Inputs/3-STATE Outputs  
Clock Inputs  
Select Inputs  
OEAB, OEBA  
Output Enable Inputs  
FACT , Quiet Series , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS010933  
www.fairchildsemi.com  

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