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74ACTQ652MTC PDF预览

74ACTQ652MTC

更新时间: 2024-10-31 22:56:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 107K
描述
Quiet Series⑩ Transceiver/Register

74ACTQ652MTC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP24,.25
针数:24Reach Compliance Code:unknown
风险等级:5.8其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:ACTJESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:7.8 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.024 A
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:9.5 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:4.4 mm
Base Number Matches:1

74ACTQ652MTC 数据手册

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June 1991  
Revised November 1999  
74ACTQ652  
Quiet Series Transceiver/Register  
General Description  
Features  
The ACTQ652 consists of bus transceiver circuits with D-  
type flip-flops, and control circuitry arranged for multiplexed  
transmission of data directly from the input bus or from  
internal registers. Data on the A or B bus will be clocked  
into the registers as the appropriate clock pin goes to the  
HIGH logic level. Output Enable pins (OEAB, OEBA) are  
provided to control the transceiver function.  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin skew AC performance  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
Outputs source/sink 24 mA  
TTL-compatible inputs  
The ACTQ652 utilizes Fairchild FACT Quiet Series tech-  
nology to guarantee quiet output switching and improved  
dynamic threshold performance. FACT Quiet Series fea-  
tures GTO output control and undershoot corrector in  
addition to split ground bus for superior performance.  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACTQ652SC  
74ACTQ652MTC  
74ACTQ652SPC  
M24B  
MTC24  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
A0A7, B0B7  
CPAB, CPBA  
SAB, SBA  
A and B Inputs/3-STATE Outputs  
Clock Inputs  
Select Inputs  
OEAB, OEBA  
Output Enable Inputs  
FACT , Quiet Series , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010933  
www.fairchildsemi.com  

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