74ACTQ573QSC PDF预览

74ACTQ573QSC

更新时间: 2025-09-22 19:01:55
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
12页 125K
描述
类型:D 型透明锁存器;元器件封装:20-QSOP;

74ACTQ573QSC 数据手册

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January 1990  
Revised October 2000  
74ACQ573 74ACTQ573  
Quiet Series Octal Latch with 3-STATE Outputs  
General Description  
Features  
The ACQ/ACTQ573 is a high-speed octal latch with buff-  
ered common Latch Enable (LE) and buffered common  
Output Enable (OE) inputs. The ACQ/ACTQ573 is func-  
tionally identical to the ACQ/ACTQ373 but with inputs and  
outputs on opposite sides of the package. The ACQ/ACTQ  
utilizes Fairchild’s Quiet Series technology to guarantee  
quiet output switching and improved dynamic threshold  
performance. FACT Quiet Series features GTO output  
control and undershoot corrector in addition to a split  
ground bus for superior performance.  
ICC and IOZ reduced by 50%  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin skew AC performance  
Improved latch-up immunity  
Inputs and outputs on opposite sides of package allow  
easy interface with microprocessors  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACQ573SC  
74ACQ573SJ  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74ACQ573MTC  
74ACQ573PC  
74ACTQ573SC  
74ACTQ573SJ  
74ACTQ573QSC  
74ACTQ573MTC  
74ACTQ573PC  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MQA20  
MTC20  
N20A  
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
D0D7  
LE  
Data Inputs  
Latch Enable Input  
OE  
3-STATE Output Enable Input  
3-STATE Latch Outputs  
O0O7  
FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation  
© 2000 Fairchild Semiconductor Corporation  
DS010633  
www.fairchildsemi.com  

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