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74ACTQ18825MTDX PDF预览

74ACTQ18825MTDX

更新时间: 2024-11-17 23:24:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
7页 82K
描述
18-Bit Buffer/Driver

74ACTQ18825MTDX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:6.10 MM, MO-153, TSSOP-56
针数:56Reach Compliance Code:unknown
风险等级:5.52其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW系列:ACT
JESD-30 代码:R-PDSO-G56JESD-609代码:e3
长度:14 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:2
位数:9功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:9.2 ns传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.1 mmBase Number Matches:1

74ACTQ18825MTDX 数据手册

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September 1991  
Revised January 2000  
74ACTQ18825  
18-Bit Buffer/Line Driver with 3-STATE Outputs  
General Description  
Features  
The ACTQ18825 contains eighteen non-inverting buffers  
with 3-STATE outputs designed to be employed as a mem-  
ory and address driver, clock driver, or bus oriented trans-  
mitter/receiver. The device is byte controlled. Each byte  
has separate 3-STATE control inputs which can be shorted  
together for full 18-bit operation.  
Utilizes Fairchild FACT Quiet Series technology  
Broadside pinout allows for easy board layout  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin output skew  
Separate control logic for each byte  
The ACTQ18825 utilizes Fairchild FACT Quiet Series  
technology to guarantee quiet output switching and  
improved dynamic threshold performance. FACT Quiet  
Series features GTO output control and undershoot cor-  
rector for superior performance.  
Extra data width for wider address/data paths or buses  
carrying parity  
Outputs source/sink 24 mA  
Additional specs for Multiple Output Switching  
Output loading specs for both 50 pF and 250 pF loads  
Ordering Code:  
Order Number  
74ACTQ18825SSC  
74ACTQ18825MTD  
Package Number  
MS56A  
Package Description  
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD56  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
I0–I17  
O0–O17  
Inputs  
Outputs  
FACT , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS010955  
www.fairchildsemi.com  

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