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74ACTQ16541SSC_NL PDF预览

74ACTQ16541SSC_NL

更新时间: 2024-11-17 20:09:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 94K
描述
Bus Driver, ACT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, LEAD FREE, MO-118, SSOP-48

74ACTQ16541SSC_NL 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:unknown风险等级:5.73
其他特性:WITH DUAL OUTPUT ENABLE系列:ACT
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:15.875 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd):13.1 ns认证状态:Not Qualified
座面最大高度:2.74 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL宽度:7.495 mm
Base Number Matches:1

74ACTQ16541SSC_NL 数据手册

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June 1991  
Revised May 2005  
74ACTQ16541  
16-Bit Buffer/Line Driver with 3-STATE Outputs  
General Description  
Features  
The ACTQ16541 contains sixteen non-inverting buffers  
with 3-STATE outputs designed to be employed as a mem-  
ory and address driver, clock driver, or bus oriented trans-  
mitter/receiver. The device is byte controlled. Each byte  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
Utilizes Fairchild FACT Quiet Series technology  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin output skew  
Separate control logic for each byte  
16-bit version of the ACTQ541  
The ACTQ16541 utilizes Fairchild Quiet Series technol-  
ogy to guarantee quiet output switching and improved  
dynamic threshold performance. FACT Quiet Series fea-  
tures GTO output control for superior performance.  
Outputs source/sink 24 mA  
Additional specs for Multiple Output Switching  
Output loading specs for both 50 pF and 250 pF loads  
Ordering Code:  
Order Number  
74ACTQ16541SSC  
74ACTQ16541MTD  
Package Number  
MS48A  
Package Description  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD48  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
I0I15  
O0O15  
Inputs  
Outputs  
FACT , Quiet Series , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation  
© 2005 Fairchild Semiconductor Corporation  
DS010936  
www.fairchildsemi.com  

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