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74ACTQ16373SSCX_NL PDF预览

74ACTQ16373SSCX_NL

更新时间: 2024-11-17 13:04:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
8页 96K
描述
Bus Driver, ACT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, MO-118, SSOP-48

74ACTQ16373SSCX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP48,.4
针数:48Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.2
系列:ACTJESD-30 代码:R-PDSO-G48
JESD-609代码:e3长度:15.875 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:8.4 ns传播延迟(tpd):15.3 ns
认证状态:Not Qualified座面最大高度:2.74 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.495 mmBase Number Matches:1

74ACTQ16373SSCX_NL 数据手册

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June 1991  
Revised November 1999  
74ACTQ16373  
16-Bit Transparent Latch with 3-STATE Outputs  
General Description  
Features  
The ACTQ16373 contains sixteen non-inverting latches  
with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. The flip-flops  
appear transparent to the data when the Latch Enable (LE)  
is HIGH. When LE is low, the data that meets the setup  
time is latched. Data appears on the bus when the Output  
Enable (OE) is LOW. When OE is HIGH, the outputs are in  
high Z state. The ACTQ16373 utilizes Fairchild’s Quiet  
Series technology to guarantee quiet output switching  
and improved dynamic threshold performance. FACT Quiet  
Series features GTO output control for superior perfor-  
mance.  
Utilizes Fairchild FACT Quiet Series technology  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Guaranteed pin-to-pin output skew  
Separate control logic for each byte  
16-bit version of the ACTQ373  
Outputs source/sink 24 mA  
Additional specs for Multiple Output Switching  
Output Loading specs for both 50 pF and 250 pF loads  
Ordering Code:  
Order Number  
74ACTQ16373MEA  
74ACTQ16373MTD  
Package Number  
MS48A  
Package Description  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD48  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
LEn  
Latch Enable Input  
Inputs  
I0I15  
O0O15  
Outputs  
FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010934  
www.fairchildsemi.com  

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