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74ACT899QCX PDF预览

74ACT899QCX

更新时间: 2024-11-01 23:14:07
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
14页 207K
描述
9-Bit Latchable Transceiver with Parity Generator/Checker

74ACT899QCX 数据手册

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August 1994  
74AC899 54ACT/74ACT899  
#
9-Bit Latchable Transceiver  
with Parity Generator/Checker  
General Description  
Features  
Y
Latchable transceiver with output sink of 24 mA  
The ’AC/’ACT899 is a 9-bit to 9-bit parity transceiver with  
transparent latches. The device can operate as a feed-  
through transceiver or it can generate/check parity from the  
8-bit data busses in either direction. The ’AC/’ACT899 fea-  
tures independent latch enables for the A-to-B direction and  
the B-to-A direction, a select pin for ODD/EVEN parity, and  
separate error signal output pins for checking parity.  
Y
Option to select generate parity and check or ‘‘feed-  
through’’ data/parity in directions A-to-B or B-to-A  
Independent latch enable for A-to-B and B-to-A direc-  
tions  
Y
Y
Y
Y
Y
Y
Select pin for ODD/EVEN parity  
ERRA and ERRB output pins for parity checking  
Ability to simultaneously generate and check parity  
May be used in system applications in place of the ’280  
May be used in system applications in place of the ’657  
and ’373 (no need to change T/R to check parity)  
4 kV minimum ESD immunity  
Y
Logic Symbol  
Connection Diagram  
Pin Assignment for PCC and LCC  
TL/F/10637–1  
TL/F/10637–2  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
FACTTM is a trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10637  
RRD-B30M75/Printed in U. S. A.  

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