5秒后页面跳转
74ACT899QC PDF预览

74ACT899QC

更新时间: 2024-11-01 22:25:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
9页 80K
描述
9-Bit Latchable Transceiver with Parity Generator/Checker

74ACT899QC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCJ, LDCC28,.5SQ
针数:28Reach Compliance Code:unknown
风险等级:5.7其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:ACTJESD-30 代码:S-PQCC-J28
JESD-609代码:e0长度:11.43 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.024 A
位数:9功能数量:1
端口数量:2端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):11 ns认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:11.43 mmBase Number Matches:1

74ACT899QC 数据手册

 浏览型号74ACT899QC的Datasheet PDF文件第2页浏览型号74ACT899QC的Datasheet PDF文件第3页浏览型号74ACT899QC的Datasheet PDF文件第4页浏览型号74ACT899QC的Datasheet PDF文件第5页浏览型号74ACT899QC的Datasheet PDF文件第6页浏览型号74ACT899QC的Datasheet PDF文件第7页 
January 1990  
Revised December 1998  
74ACT899  
9-Bit Latchable Transceiver with Parity  
Generator/Checker  
General Description  
Features  
Latchable transceiver with output sink of 24 mA  
The ACT899 is a 9-bit to 9-bit parity transceiver with trans-  
parent latches. The device can operate as a feed-through  
transceiver or it can generate/check parity from the 8-bit  
data busses in either direction. The ACT899 features inde-  
pendent latch enables for the A-to-B direction and the B-to-  
A direction, a select pin for ODD/EVEN parity, and sepa-  
rate error signal output pins for checking parity.  
Option to select generate parity and check or  
“feed-through” data/parity in directions A-to-B or B-to-A  
Independent latch enable for A-to-B and B-to-A  
directions  
Select pin for ODD/EVEN parity  
ERRA and ERRB output pins for parity checking  
Ability to simultaneously generate and check parity  
May be used in system applications in place of the 280  
May be used in system applications in place of the 657  
and 373 (no need to change T/R to check parity)  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT899QC  
V28A  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450” Square  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Assignment for PCC  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010637.prf  
www.fairchildsemi.com  

与74ACT899QC相关器件

型号 品牌 获取价格 描述 数据表
74ACT899QCQB NSC

获取价格

9-Bit Latchable Transceiver with Parity Generator/Checker
74ACT899QCX NSC

获取价格

9-Bit Latchable Transceiver with Parity Generator/Checker
74ACT899QCX_NL FAIRCHILD

获取价格

Registered Bus Transceiver, ACT Series, 1-Func, 9-Bit, True Output, CMOS, PQCC28, 0.450 X
74ACT899QMQB NSC

获取价格

9-Bit Latchable Transceiver with Parity Generator/Checker
74ACT899QMX NSC

获取价格

9-Bit Latchable Transceiver with Parity Generator/Checker
74ACT899SC FAIRCHILD

获取价格

Registered Bus Transceiver, ACT Series, 1-Func, 9-Bit, True Output, CMOS, PDSO20, SO-20
74ACTQ00 FAIRCHILD

获取价格

Quiet Series⑩ Quad 2-Input NAND Gate
74ACTQ00_99 FAIRCHILD

获取价格

Quiet Series⑩Quad 2-Input NAND Gate
74ACTQ00CW FAIRCHILD

获取价格

NAND Gate, ACT Series, 4-Func, 2-Input, CMOS
74ACTQ00MTC FAIRCHILD

获取价格

Quiet Series⑩ Quad 2-Input NAND Gate