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74ACT899CW PDF预览

74ACT899CW

更新时间: 2024-11-02 12:58:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 80K
描述
Registered Bus Transceiver, ACT Series, 1-Func, 9-Bit, True Output, CMOS, DIE

74ACT899CW 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIE,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.79Is Samacsys:N
系列:ACTJESD-30 代码:R-XUUC-N20
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:9
功能数量:1端口数量:2
端子数量:20输出特性:3-STATE
输出极性:TRUE封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP传播延迟(tpd):10.5 ns
认证状态:Not Qualified最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

74ACT899CW 数据手册

 浏览型号74ACT899CW的Datasheet PDF文件第2页浏览型号74ACT899CW的Datasheet PDF文件第3页浏览型号74ACT899CW的Datasheet PDF文件第4页浏览型号74ACT899CW的Datasheet PDF文件第5页浏览型号74ACT899CW的Datasheet PDF文件第6页浏览型号74ACT899CW的Datasheet PDF文件第7页 
January 1990  
Revised December 1998  
74ACT899  
9-Bit Latchable Transceiver with Parity  
Generator/Checker  
General Description  
Features  
Latchable transceiver with output sink of 24 mA  
The ACT899 is a 9-bit to 9-bit parity transceiver with trans-  
parent latches. The device can operate as a feed-through  
transceiver or it can generate/check parity from the 8-bit  
data busses in either direction. The ACT899 features inde-  
pendent latch enables for the A-to-B direction and the B-to-  
A direction, a select pin for ODD/EVEN parity, and sepa-  
rate error signal output pins for checking parity.  
Option to select generate parity and check or  
“feed-through” data/parity in directions A-to-B or B-to-A  
Independent latch enable for A-to-B and B-to-A  
directions  
Select pin for ODD/EVEN parity  
ERRA and ERRB output pins for parity checking  
Ability to simultaneously generate and check parity  
May be used in system applications in place of the 280  
May be used in system applications in place of the 657  
and 373 (no need to change T/R to check parity)  
Ordering Code:  
Order Number Package Number  
Package Description  
74ACT899QC  
V28A  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450” Square  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Assignment for PCC  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS010637.prf  
www.fairchildsemi.com  

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